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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HT45F2020 датащи(PDF) 12 Page - Holtek Semiconductor Inc |
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HT45F2020 датащи(HTML) 12 Page - Holtek Semiconductor Inc |
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12 / 85 page  Rev. 1.00 12 April 11, 2017 Rev. 1.00 13 April 11, 2017 HT45F2020/HT45F2022 Sound Effect Generator Flash MCU HT45F2020/HT45F2022 Sound Effect Generator Flash MCU Power-on Reset Characteristics Ta=25°C Symbol Parameter Test Conditions Min. Typ. Max. Unit VDD Conditions VPOR VDD Start Voltage to Ensure Power-on Reset — — — — 100 mV RRPOR VDD Rising Rate to Ensure Power-on Reset — — 0.035 — — V/ms tPOR Minimum Time for VDD Stays at VPOR to Ensure Power-on Reset — — 1 — — ms VDD tPOR RRPOR VPOR Time System Architecture Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed totheirinternalsystemarchitecture.Thedevicetakesadvantageoftheusualfeaturesfoundwithin RISCmicrocontrollersprovidingincreasedspeedofoperationandenhancedperformance.The pipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstructionexecution areoverlapped,henceinstructionsareeffectivelyexecutedinonecycle,withtheexceptionofbranch orcallinstructions.An8-bitwideALUisusedinpracticallyallinstructionsetoperations,which carriesoutarithmeticoperations,logicoperations,rotation,increment,decrement,branchdecisions, etc.TheinternaldatapathissimplifiedbymovingdatathroughtheAccumulatorandtheALU. CertaininternalregistersareimplementedintheDataMemoryandcanbedirectlyorindirectly addressed.Thesimpleaddressingmethodsoftheseregistersalongwithadditionalarchitectural featuresensurethataminimumofexternalcomponentsisrequiredtoprovideafunctionalI/O controlsystemwithmaximumreliabilityandflexibility.Thismakesthedevicesuitableforlow-cost, high-volumeproductionforcontrollerapplications. Clocking and Pipelining Themainsystemclock,derivedfromeitheraHIRCorLIRCoscillatorissubdividedintofour internallygeneratednon-overlappingclocks,T1~T4.TheProgramCounterisincrementedatthe beginningoftheT1clockduringwhichtimeanewinstructionisfetched.TheremainingT2~T4 clockscarryoutthedecodingandexecutionfunctions.Inthisway,oneT1~T4clockcycleforms oneinstructioncycle.Althoughthefetchingandexecutionofinstructionstakesplaceinconsecutive instructioncycles,thepipeliningstructureofthemicrocontrollerensuresthatinstructionsare effectivelyexecutedinoneinstructioncycle.Theexceptiontothisareinstructionswherethe contentsoftheProgramCounterarechanged,suchassubroutinecallsorjumps,inwhichcasethe instructionwilltakeonemoreinstructioncycletoexecute. |
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