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STM32F410RB датащи(PDF) 24 Page - STMicroelectronics |
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STM32F410RB датащи(HTML) 24 Page - STMicroelectronics |
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24 / 142 page ![]() Functional overview STM32F410x8/B 24/142 DocID028094 Rev 5 and the HSE crystal oscillators are disabled. The voltage regulator can also be put either in normal or in low-power mode. The RTC and the low-power timer (LPTIM1) can remain active in Stop mode. They can consequently be used to wake up the device from this mode. The device can be woken up from the Stop mode by any of the EXTI line (the EXTI line source can be one of the 16 external lines, the PVD output, LPTIM1, the RTC alarm/ wakeup/ tamper/ time stamp events). • Standby mode The Standby mode is used to achieve the lowest power consumption. The internal voltage regulator is switched off so that the entire 1.2 V domain is powered off. The PLL, the HSI RC and the HSE crystal oscillators are also switched off. After entering Standby mode, the SRAM and register contents are lost except for registers in the backup domain when selected. The device exits the Standby mode when an external reset (NRST pin), an IWDG reset, a rising edge on the WKUP pin, or an RTC alarm/ wakeup/ tamper/time stamp event occurs. Standby mode is not supported when the embedded voltage regulator is bypassed and the 1.2 V domain is controlled by an external power. 3.19 VBAT operation The VBAT pin allows to power the device VBAT domain from an external battery, an external super-capacitor, or from VDD when no external battery and an external super-capacitor are present. VBAT operation is activated when VDD is not present. The VBAT pin supplies the RTC and the backup registers. Note: When the microcontroller is supplied from VBAT, external interrupts and RTC alarm/events do not exit it from VBAT operation. When PDR_ON pin is not connected to VDD (internal Reset OFF), the VBAT functionality is no more available and VBAT pin should be connected to VDD. 3.20 Timers and watchdogs The devices embed one advanced-control timer, four general purpose timers, one low power timer, two watchdog timers and one SysTick timer. All timer counters can be frozen in debug mode. Table 5 compares the features of the advanced-control and general-purpose timers. |
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