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STM32F410RB датащи(PDF) 6 Page - STMicroelectronics

номер детали STM32F410RB
подробное описание детали  Clock, reset and supply management
PDF  142 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STM32F410RB датащи(HTML) 6 Page - STMicroelectronics

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List of tables
STM32F410x8/B
6/142
DocID028094 Rev 5
List of tables
Table 1.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2.
STM32F410x8/B features and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 3.
Embedded bootloader interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 4.
Regulator ON/OFF and internal power supply supervisor availability. . . . . . . . . . . . . . . . . 22
Table 5.
Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 6.
Comparison of I2C analog and digital filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 7.
USART feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 8.
Legend/abbreviations used in the pinout table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 9.
STM32F410x8/B pin definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 10.
Alternate function mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 11.
STM32F410x8/B register boundary addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 12.
Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 13.
Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 14.
Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 15.
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 16.
Features depending on the operating power supply range . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 17.
VCAP_1 operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 18.
Operating conditions at power-up / power-down (regulator ON) . . . . . . . . . . . . . . . . . . . . 56
Table 19.
Operating conditions at power-up / power-down (regulator OFF). . . . . . . . . . . . . . . . . . . . 56
Table 20.
Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 21.
Typical and maximum current consumption, code with data processing (ART
accelerator disabled) running from SRAM - VDD = 1.7 V . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Table 22.
Typical and maximum current consumption, code with data processing (ART
accelerator disabled) running from SRAM - VDD = 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Table 23.
Typical and maximum current consumption in run mode, code with data processing
(ART accelerator enabled except prefetch) running from Flash memory- VDD = 1.7 V. . . 61
Table 24.
Typical and maximum current consumption in run mode, code with data processing
(ART accelerator enabled except prefetch) running from Flash memory - VDD = 3.6 V . . 62
Table 25.
Typical and maximum current consumption in run mode, code with data processing
(ART accelerator disabled) running from Flash memory - VDD = 3.6 V. . . . . . . . . . . . . . . 63
Table 26.
Typical and maximum current consumption in run mode, code with data processing
(ART accelerator disabled) running from Flash memory - VDD = 1.7 V. . . . . . . . . . . . . . . 64
Table 27.
Typical and maximum current consumption in run mode, code with data processing
(ART accelerator enabled with prefetch) running from Flash memory - VDD = 3.6 V . . . . . 65
Table 28.
Typical and maximum current consumption in Sleep mode - VDD = 3.6 V . . . . . . . . . . . . . 66
Table 29.
Typical and maximum current consumption in Sleep mode - VDD = 1.7 V . . . . . . . . . . . . . 68
Table 30.
Typical and maximum current consumptions in Stop mode - VDD = 1.7 V . . . . . . . . . . . . . 70
Table 31.
Typical and maximum current consumption in Stop mode - VDD=3.6 V. . . . . . . . . . . . . . . 70
Table 32.
Typical and maximum current consumption in Standby mode - VDD= 1.7 V . . . . . . . . . . . 70
Table 33.
Typical and maximum current consumption in Standby mode - VDD= 3.6 V . . . . . . . . . . . 71
Table 34.
Typical and maximum current consumptions in VBAT mode
(LSE and RTC ON, LSE low- drive mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Table 35.
Switching output I/O current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
Table 36.
Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Table 37.
Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Table 38.
High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 39.
Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Table 40.
HSE 4-26 MHz oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81



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