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ST72561J4-Auto датащи(PDF) 139 Page - STMicroelectronics

номер детали ST72561J4-Auto
подробное описание детали  Clock, reset and supply management
PDF  324 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72561J4-Auto датащи(HTML) 139 Page - STMicroelectronics

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ST72561-Auto
8-bit timer (TIM8)
Doc ID 12370 Rev 8
139/324
13.6
Summary of timer modes
13.7
Register description
Each Timer is associated with three control and status registers, and with six data registers
(8-bit values) relating to the two input captures, the two output compares, the counter and
the alternate counter.
13.7.1
Control register 1 (CR1)
Read/ write
Reset value: 0000 0000 (00h)
Bit 7 = ICIE Input Capture Interrupt Enable.
0: Interrupt is inhibited.
1: A timer interrupt is generated whenever the ICF1 or ICF2 bit of the SR register is set.
Bit 6 = OCIE Output Compare Interrupt Enable.
0: Interrupt is inhibited.
1: A timer interrupt is generated whenever the OCF1 or OCF2 bit of the SR register is
set.
Bit 5 = TOIE Timer Overflow Interrupt Enable.
0: Interrupt is inhibited.
1: A timer interrupt is enabled whenever the TOF bit of the SR register is set.
Table 54.
Timer modes
Modes
Available resources
Input capture 1
Input capture 2
Output compare
1
Output compare 2
Input Capture
(1 and/or 2)
Yes
Yes
Yes
Yes
Output Compare
(1 and/or 2)
One Pulse Mode
No
Not
Recommended(1)
1.
See note 4 in One pulse mode.
No
Partially(2)
2.
See note 5 in One pulse mode.
PWM Mode
Not
Recommended(3)
3.
See note 4 in Pulse width modulation mode.
No
7
0
ICIE
OCIE
TOIE
FOLV2
FOLV1
OLVL2
IEDG1
OLVL1



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