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ST72561J4-Auto датащи(PDF) 136 Page - STMicroelectronics

номер детали ST72561J4-Auto
подробное описание детали  Clock, reset and supply management
PDF  324 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST72561J4-Auto датащи(HTML) 136 Page - STMicroelectronics

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8-bit timer (TIM8)
ST72561-Auto
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Doc ID 12370 Rev 8
Figure 68.
One pulse mode timing example
Figure 69.
Pulse width modulation mode timing example
13.3.6
Pulse width modulation mode
Pulse Width Modulation (PWM) mode enables the generation of a signal with a frequency
and pulse length determined by the value of the OC1R and OC2R registers.
Pulse Width Modulation mode uses the complete Output Compare 1 function plus the
OC2R register, and so this functionality can not be used when PWM mode is activated.
In PWM mode, double buffering is implemented on the output compare registers. Any new
values written in the OC1R and OC2R registers are taken into account only at the end of the
PWM period (OC2) to avoid spikes on the PWM output pin (OCMP1).
Procedure
To use pulse width modulation mode:
COUNTER
FC
FD
FE
D0
D1
D2
D3
FC
FD
OLVL2
OLVL2
OLVL1
ICAP1
OCMP1
compare1
Note: IEDG1 = 1, OC1R = D0h, OLVL1 = 0, OLVL2 = 1
F8
F8
D3
IC1R
COUNTER E2
E2
FC
OLVL2
OLVL2
OLVL1
OCMP1
compare2
compare1
compare2
Note: OC1R = D0h, OC2R = E2, OLVL1 = 0, OLVL2 = 1
FC
FD
FE
D0
D1
D2



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