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L6751 датащи(PDF) 44 Page - STMicroelectronics |
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L6751 датащи(HTML) 44 Page - STMicroelectronics |
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44 / 59 page ![]() Efficiency optimization L6751 44/59 Doc ID 023992 Rev 1 9.2 Variable frequency diode emulation (VFDE) As the current required by the load is reduced, the L6751 progressively reduces the number of switching phases according to DPM settings on the multi-phase section. If single-phase operation is configured, when the delivered current approaches the CCM/DCM boundary, the controller enters VFDE operation. The single-phase section, being a single-phase, enters VFDE operation always when the delivered current approaches the CCM/DCM boundary. In a common single-phase DC-DC converter, the boundary between CCM and DCM is when the delivered current is perfectly equal to 1/2 of the peak-to-peak ripple into the inductor (Iout = Ipp/2). Further decreasing the load in this condition maintaining CCM operation would cause the current into the inductor to reverse, therefore sinking current from the output for a part of the off-time. This results in a poorly efficient system. The L6751 is able (via the CSPx/CSNx pins) to detect the sign of the current across the inductor (zero cross detection, ZCD), so it is able to recognize when the delivered current approaches the CCM/DCM boundary. In VFDE operation, the controller fires the high-side MOSFET for a TON and the low-side MOSFET for a TOFF (the same as when the controller works in CCM mode) and waits the necessary time until next firing in high impedance (HiZ). The consequence of this behavior is a linear reduction of the “apparent” switching frequency that, in turn, results in an improvement of the efficiency of the converter when in very light load conditions. The “apparent” switching frequency reduction is limited to 30 kHz so as not to enter the audible range. 9.2.1 VFDE and DrMOS To guarantee correct behavior for the DrMOS power stage compliant with Intel specification rev3, it is recommended to control the DrMOS’ SMOD input through the ENDRV/SENDRV pins of the L6751. DrMOS enable must be controlled with the same signal used for the L6751 EN pin. Figure 12. Output current vs. switching frequency in PSK mode t Iout = Ipp/2 t Iout < Ipp/2 Tsw Tsw Tvfde AM14819v1 |
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