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L6751 датащи(PDF) 43 Page - STMicroelectronics

номер детали L6751
подробное описание детали  Digitally controlled dual PWM for Intel VR12 and AMD SVI
PDF  59 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6751 датащи(HTML) 43 Page - STMicroelectronics

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L6751
Efficiency optimization
Doc ID 023992 Rev 1
43/59
9
Efficiency optimization
As per VR12 specifications, the SVI master may define different power states for the VR
controller. This is performed by SetPS commands. The L6751 re-configures itself to improve
overall system efficiency, according to Table 15.
9.1
Dynamic phase management (DPM)
Dynamic phase management allows the number of working phases to be adjusted
according to the delivered current still maintaining the benefits of the multi-phase regulation.
Phase number is reduced by monitoring the voltage level across the IMON pin: the L6751
reduces the number of working phases according to the strategy defined by the DPM
pinstrapping and/or PMBus (TM) commands received (see Table 11). DPM12 refers to the
current at which the controller changes from 1 to 2 phases. In the same way, DPM23 defines
the current at which the controller changes from 2 to 3 phases and so on.
When DPM is enabled, the L6751 starts monitoring the IMON voltage for phase number
modification after VR_RDY has transition high: the soft-start is then implemented in
interleaving mode with all the available phases enabled.
DPM is reset in the case of an SetVID command that affects the CORE section and when
LTB Technology detects a load transient. After being reset, if the voltage across IMON is
compatible, DPM is re-enabled after proper delay.
Delay in the intervention of DPM can be adjusted by properly sizing the filter across the
IMON pin. Increasing the capacitance results in increased delay in the DPM intervention.
See Section 7.2.1 for guidelines in designing the IMON load indicator.
Note:
During load transients with light slope, the filtering of IMON may result too slow for the IC to
set the correct number of phases required for the current effectively loading the system (LTB
does not trigger in the case of light slopes). The L6751 features a safety mechanism which
re-enables phases that were switched off by comparing ILIM and IMON pin voltage. In fact,
the ILIM pin is lightly filtered in order to perform fast reaction of OC protection while IMON is
heavily filtered to perform correct averaging of the information. While working continuously
in DPM, the device compares the information of IMON and ILIM: ILIM voltage is divided in N
steps whose width is VOCP/(2*N) (where VOCP = 2.5 V and N the number of stuffed phases).
If the DPM phase number resulting from IMON is not coherent with the step in which ILIM
stays, the phase number is increased accordingly. The mechanism is active only to increase
the phase number which is reduced again by DPM.
Table 15.
Efficiency optimization
Feature
PS00h
PS01h
DPM
According to pinstrapping
Active. 1Phase/2Phase according to
Iout
VFDE
Active when in single-phase and
DPM enabled
Active when in single-phase
GDC
12 V driving
GDC set to 5 V



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