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PC97338 датащи(PDF) 173 Page - National Semiconductor (TI) |
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PC97338 датащи(HTML) 173 Page - National Semiconductor (TI) |
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173 / 221 page ![]() 173 www.national.com LOST_FR = 0 Least significant 8 bits of the received frame length. LOST_FR = 1 Number of lost frames RFRL(H) – Received-Frame-Length at ST_FIFO Bottom, Read-Only This register should be read only when the VLD bit in FRMST is 1. The information returned depends on the setting of the LOST_FR bit. Upon reset, all bits are set to 0. LOST_FR = 0 Most significant 5 bits of the received frame length. LOST_FR = 1 All 0's Reading this register removes the bottom ST_FIFO entry. 5.20 BANK 6 TABLE 88. Bank 6 Register Set 5.20.1 IRCR3 – Infrared Control Register 3 Used to select the operating mode of the infrared in- terface. Upon reset, the content of this register is 20h. FIGURE 88. Infrared Control Register 3 5.20.2 MIRPW – MIR Pulse Width Register This register is used to program the width of the trans- mitted MIR infrared pulses in increments of either 20.833 ns or 41.666 ns depending on the setting of the MDSR bit in the IRCR2 register. The programmed value has no effect on the MIR receiver. After reset, the content of this register is 0Ah. FIGURE 88. MIR Pulse Width Register Address Offset Register Name Description 00h IRCR3 Infrared Control Register 3 01h MIR_PW MIR Pulse Width 02h SIR_PW SIR Pulse Width Register 03h LCR/ BSR Link Control/ Bank Select Register 04h BFPL Beginning Flags/ Preamble Length Register 05h - 07h Reserved 7 6 5 432 10 Reset Required 0 0 0 0 0 1 0 0 0 0 TXCRC_INV MIR_CRC FIR_CRC SHMD_DS SHDM_DS Reserved TXCRC_DS Reserved B0 Reserved. Write 0. B1 TXCRC_DS – Disable Transmitter CRC. When set to 1, a CRC is not transmitted. B2 TXCRC_INV – Invert Transmitter CRC. When set to 1, an inverted CRC is transmit- ted.This bit can be used to force a bad CRC for testing purposes. B3 Reserved. Write 0. B4 MIR_CRC – MIR Mode CRC Select. Determines the length of the CRC in MIR mode. 0 → 16-bit CRC 1 → 32-bit CRC B5 FIR_CRC – FIR Mode CRC Select. Determines the length of the CRC in FIR mode. 0 → 16-bit CRC 1 → 32-bit CRC B6 SHMD_DS – Sharp-IR Modulation Disable. When set to 1, internal 500 kHz transmitter mod- ulation is disabled. B7 SHDM_DS – Sharp-IR Demodulation Disable. When set to 1, internal 500 kHz receiver demod- ulation is disabled. 765 43 210 Reset Required 0 1 0 1 0 0 0 0 MPW(3-0) Reserved |
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