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PC87351 датащи(PDF) 74 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали PC87351
подробное описание детали  PC87351 PC98 and ACPI Compliant SuperI/O with System Wake-Up Control
PDF  86 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87351 датащи(HTML) 74 Page - National Semiconductor (TI)

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11.0 Device Characteristics (Continued)
74
www.national.com
11.1.8
Input with TTL Schmitt Trigger
Symbol: INTS
11.1.9
Output, Totem-Pole Buffer
Symbol: Op/n
Output, Totem-Pole buffer that is capable of sourcing
p mA and sinking n mA
11.1.10 Output, Open-Drain Buffer
Symbol: ODn
Output, Open-Drain output buffer that is capable of sinking
n mA. Output from these signals is open-drain and cannot be
forced high.
Notes:
1. All pins are back-drive protected.
2. The following pins have a static pull-up resistor and therefore may have input leakage current (when VIN = VSS) of about
-250
µA: TBD
3. The following pins have a static pull-down resistor and therefore may have input leakage current (when VIN = VDD) of
about 200
µA: TBD
4. Output from SLCT, BUSY/WAIT (and PE if bit 2 of PP Confg0 Register is “0”) is open-drain in all SPP modes, except in
SPP Compatible mode when the setup mode is ECP-based FIFO and bit 4 of the Control2 parallel port register is 1.
Otherwise, output from these signals is level 2. External 4.7 KW pull-up resistors should be used.
5. Output from ACK, ERR (and PE if bit 2 of PP Confg0 Register is “1”) is open-drain in all SPP modes, except in SPP
Compatible mode when the setup mode is ECP-based FIFO and bit 4 of the Control2 parallel port register is 1. Other-
wise, output from these signals is level 2. External 4.7 KW pull-up resistors should be used.
6. IOH on pins P12 and P17 are driven for 10 nsec after the low-to-high transition.
7. Output from STB, AFD, INIT, SLIN is open-drain in all SPP modes, except in SPP Compatible mode when the setup
mode is ECP-based (FIFO). Otherwise, output from these signals is Level 2. External 4.7 K
Ω pull-up resistors should be
used.
8. Output from PD7-0 is open-drain in all SPP modes, except in SPP Compatible mode when the setup mode is ECP-based
(FIFO) and bit 4 of the Control2 parallel port register is 1. Otherwise, output from these signals is Level 2. External 4.7
K
Ω pull-up resistors should be used.
9. IOH is valid for a GPIO signals only when it is not configured as open-drain.
1. Not tested. Guaranteed by design.
Symbol Parameter
Conditions
Min
Max
Unit
VIH
Input High Voltage
2.0
VDD
1
V
VIL
Input Low Voltage
−0.5 1
0.8
V
IIL
Input Leakage Current
VIN = VDD
10
µA
VIN = VSS
−10
µA
VH
Input Hysteresis
250
mV
Symbol Parameter
Conditions
Min
Max
Unit
VOH
Output High Voltage
IOH = −p mA
2.4
V
VOL
Output Low Voltage
IOL = n mA
0.4
V
Symbol Parameter
Conditions
Min
Max
Unit
VOL
Output Low Voltage
IOL = n mA
0.4
V



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