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PC87351 датащи(PDF) 41 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали PC87351
подробное описание детали  PC87351 PC98 and ACPI Compliant SuperI/O with System Wake-Up Control
PDF  86 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87351 датащи(HTML) 41 Page - National Semiconductor (TI)

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2.0 Device Architecture and Configuration (Continued)
41
www.national.com
2.8
SERIAL PORT 2 - LOGICAL DEVICE 2
2.8.1
General Description
Serial Port 2 includes IR functionality as described in the Serial Port 2 with IR chapter.
2.8.2
Configuration
2.8.3
Serial Port 2 Configuration Register
This register is reset by hardware to 02h.
Location:
Index F0h
Type:
R/W
Index
Configuration Register or Action
Type
Reset
30h Activate. See also bit 0 of the SIOCF1 Register.
R/W
00h
60h Base Address MSB Register. Bits 7-3 (for A15-11) are read only, 00000b.
R/W
02h
61h Base Address LSB Register. Bit 2-0 (for A2-0) are read only, 000b.
R/W
F8h
70h Interrupt Number
R/W
03h
71h Interrupt Type. Bit 1 is R/W; other bits are read only.
R/W
03h
74h DMA Channel Select 0 (RX_DMA)
R/W
04h
75h DMA Channel Select 1 (TX_DMA)
R/W
04h
F0h Serial Port 2 Configuration Register
R/W
02h
Bit
76543210
Name
Bank
Select
Enable
Reserved
Busy
Indicator
Power
Mode
Control
TRI-STATE
Control
Reset
00000010
Bit
Description
7
Bank Select Enable. Enables bank switching for Serial Port 2.
0: All attempts to access the extended registers in Serial Port 2 are ignored (default).
1: Enables bank switching for Serial Port 2.
6-3
Reserved
2
Busy Indicator. This read only bit can be used by power management software to decide when to power-down
the Serial Port 2 logical device.
0: No transfer in progress (default).
1: Transfer in progress.
1
Power Mode Control. When the logical device is active in:
0: Low power mode
Serial Port 2 Clock disabled. The output signals are set to their default states. The RI input signal can be
programmed to generate an interrupt. Registers are maintained. (Unlike Active bit in Index 30 that also
prevents access to Serial Port 2 registers.)
1: Normal power mode
Serial Port 2 clock enabled. Serial Port 2 is functional when the logical device is active (default).
0
TRI-STATE Control. This bit controls the TRI-STATE status of the device output pins when it is inactive
(disabled). One exception is the IRTX pin. It is driven to 0 when Serial Port 2 is inactive, and is not affected by
this bit.
0: Disabled (default)
1: Enabled when device inactive



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