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PC87351 датащи(PDF) 24 Page - National Semiconductor (TI) |
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PC87351 датащи(HTML) 24 Page - National Semiconductor (TI) |
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24 / 86 page ![]() 24 www.national.com 2.0 Device Architecture and Configuration The SuperI/O device comprises a collection of generic functional blocks. Each functional block is described in a separate chapter in this book. However, some parameters in the implementation of each functional block may vary per SuperI/O de- vice. This chapter describes the PC87351 structure and provides all device specific information, including special implemen- tation of generic blocks, host interface and device configuration. 2.1 OVERVIEW The PC87351 consists of 9 logical devices, a host interface, and a central configuration register set, all built around a central, internal bus. The internal bus is a replication of an 8-bit ISA bus protocol. The host interface serves as a bridge between the external ISA interface and the internal bus. It supports 8-bit I/O read, 8- bit I/O write and 8-bit DMA transactions, as defined in Personal Computer Bus Standard P996. The central configuration register set supports ACPI compliant PnP configuration. The configuration registers are structured as a subset of the Plug and Play Standard Registers, defined in Appendix A of the Plug and Play ISA Specification Version 1.0a by Intel and Microsoft. All system resources assigned to the functional blocks (I/O address space, DMA channels and IRQ lines) are configured in, and managed by, the central configuration register set. In addition, some function-specific pa- rameters are configurable through this unit and distributed to the functional blocks through special control signals. Figure 2-1. Detailed PC87351 Block Diagram DRATE0 SIN1 SOUT1 RTS1 DTR1/BOUT1 CTS1 DSR1 DCD1 RI1 RDATA WDATA WGATE HDSEL DIR STEP TRK0 INDEX DSKCHG WP MTR1,0 DR1,0 DENSEL P12,P17 GA20, KBRST KBCLK KBDAT MDAT MCLK Keyboard with IR IRRX2,1 IRTX IRSL0 Fan Speed Serial Port 1 PD7/MSEN1 SLIN/STEP/ASTRB PD0/INDEX PD1/TRK0 PD2/WP PD3/RDATA PD4/DSKCHG PD5/MSEN0 PD6/DRATE0 PNF ACK/DR1 BUSY/MTR1/WAIT PE/WDATA SLCT/WGATE AFD/DENSEL/DSTRB ERR/HDSEL INIT/DIR STB/WRITE and Mouse Controller and Control Registers System Wake-Up Control DACK3-1 DRQ3-1 GPIO Ports Parallel Port FDC Host Interface IRQ9,11-12 IRQ1,3-7 SIN2 SOUT2 RTS2 DTR2/BOUT2 CTS2 DSR2 DCD2 RI2 Serial Port 2 Configuration PPM TC |
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