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LAN91C111 датащи(PDF) 14 Page - Microchip Technology |
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LAN91C111 датащи(HTML) 14 Page - Microchip Technology |
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14 / 125 page ![]() LAN91C111 DS00002276A-page 14 2011-2016 Microchip Technology Inc. Note 5-1 If the EEPROM is enabled. 113-116 115-118 Transmit Data TXD3- TXD0 O12 Outputs. Transmit Data nibble to MII PHY. 109 111 Transmit Clock TX25 I with pullup Input. Transmit clock input from MII. Nibble rate clock (25MHz for 100Mbps & 2.5MHz for 10Mbps). 118 120 Receive Clock RX25 I with pullup Input. Receive clock input from MII PHY. Nibble rate clock. (25MHz for 100Mbps & 2.5MHz for 10Mbps). 121-124 123-126 Receive Data RXD3- RXD0 I with pullup Inputs. Received Data nibble from MII PHY. 25 27 Management Data Input MDI I with pulldown MII management data input. 26 28 Management Data Output MDO O4 MII management data output. 27 29 Management Clock MCLK O4 MII management clock. 126 128 Receive Error RX_ER I with pulldown Input. Indicates a code error detected by PHY. Used by the LAN91C111 to discard the packet being received. The error indication reported for this event is the same as a bad CRC (Receive Status Word bit 13). 2 4 nChip Select Output nCSOUT O4 Output. Chip Select provided for mapping of PHY functions into LAN91C111 decoded space. Active on accesses to LAN91C111’s eight lower addresses when the BANK SELECTED is 7. 12 14 External Resistor RBIAS NA Transmit Current Set. An external resistor connected between this pin and GND will set the output current for the TP transmit outputs 14 16 TPO+ O/I Twisted Pair Transmit Output, Positive. 15 17 TPO- O/I Twisted Pair Transmit Output, Negative 17 19 TPI+ I/O Twisted Pair Receive Input, Positive 18 20 TPI- I/O Twisted Pair Receive Input, Negative. 22 24 nLEDA OD24 PHY LED Output 23 25 nLEDB OD24 PHY LED Output Pin No. Name Symbol Buffer Type Description TQFP QFP |
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