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LAN91C111 датащи(PDF) 73 Page - Microchip Technology |
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LAN91C111 датащи(HTML) 73 Page - Microchip Technology |
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73 / 125 page ![]() LAN91C111 DS00002276A-page 74 2011-2016 Microchip Technology Inc. 9.8 Register 18. Status Output - Structure and Bit Definition APOLDIS: Auto Polarity Disable 1 = Auto Polarity Correction Function Disabled 1 = Auto Polarity Correction Function Disabled 0 = Normal 0 = Normal JABDIS: Jabber Disable Select 1 = Jabber Disabled RW 1 = Jabber Disabled 0 = Enabled 0 = Enabled MREG: Multiple Register Access Enable 1 = Multiple Register Access Enabled 0 = No Multiple Register Access 0 = No Multiple Register Access INTMDIO: Interrupt Scheme Select 1 = Interrupt Signaled With MDIO Pulse During Idle 1 = Interrupt Signaled With MDIO Pulse During Idle 0 = Interrupt Not Signaled On MDIO 0 = Interrupt Not Signaled On MDIO Reserved: Reserved for Factory Use INT LNKFAIL LOSSSYNC CWRD SSD ESD RPOL JAB R R/LT R/LT R/LT R/LT R/LT R/LT R/LT 00 0 0 0 0 0 0 SPDDET DPLXDET Reserved Reserved Reserved Reserved Reserved Reserved R/LT R/LT R R R R R R 10 0 0 0 0 0 0 |
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