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LAN91C111 датащи(PDF) 72 Page - Microchip Technology

номер детали LAN91C111
подробное описание детали  10/100 Non-PCI Ethernet Single Chip MAC PHY
PDF  125 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

LAN91C111 датащи(HTML) 72 Page - Microchip Technology

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 2011-2016 Microchip Technology Inc.
DS00002276A-page 73
LAN91C111
9.7
Register 17. Configuration 2 - Structure and Bit Definition
LNKDIS:
Link Disable
1 = Receive Link Detect Function
Disabled (Force Link Pass)
0 = Normal
XMTDIS:
TP Transmit
1 = TP Transmitter Disabled
0 = Normal
XMTPDN:
TP Transmit
1 = TP Transmitter Powered Down
Powerdown
0 = Normal
RESERVED:
RESERVED
Reserved, Must be 0 for Proper
Operation
BYPSCR:
Bypass
1 = Bypass Scrambler/Descrambler
Scrambler/Descr-
0 = No Bypass
ambler Select
UNSCDS:
Unscrambled Idle
1 = Disable Auto-Negotiation with
devices that transmit unscrambled
Reception Disable
idle on powerup and various
instances
0 = Enables Auto-Negotiation with
devices that transmit unscrambled
idle on powerup and various
instances
EQLZR:
Receive Equalizer
1 = Receive Equalizer Disabled, Set
To 0 Length
Select
0 = Receive Equalizer On (For
100MB Mode Only)
CABLE
Cable Type Select
1 = STP (150 Ohm)
0 = UTP (100 Ohm)
RLVL0
Receive Input
1 = Receive Squelch Levels Reduced
By 4.5 dB R/W
Level Adjust
0 = Normal
TLVL0-3
Transmit Output
See Table 7-2
Level Adjust
TRF0-1
Transmitter
11 = -0.25nS
Rise/Fall Time
10 = +0.0nS
Adjust
01 = +0.25nS
00 = +0.50nS
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
RR
R
R
R
R
R
R
11
1
1
1
1
1
1
Reserved
Reserved
APOLDIS
JABDIS
MREG
INTMDIO
Reserved
Reserved
R
R
RW
RW
RW
RW
RW
RW
00
0
0
0
0
0
0



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