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APPLICATION INFORMATION

Data

14 15

DACO2

AVSS

DACO1

AVDD

TP2

PIN

DIN

TP1

CLREF

AVDD

AVSS

VSS

36

35

34

33

32

31

30

29

28

27

26

25

16

1

2

3

4

5

6

7

8

9

10

11

12

D0/SDO

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

17 18 19 20

47 46 45 44 43

48

42

40 39 38

41

21 22 23 24

37

13

3 V

0.22

µF

0.22

µF

Buffer

0.1

µF

1

µF

0.1

µF

0.1

µF

0.1

µF

0.1

µF

VSP1221

ICX205

(CCD)

CXD2460

(Timing Generator)

CLAMP

SR

SV

OBCLP

BLKG

ADCCLK

Signal Processor

Block

PIXEL CLOCK

LINE CLOCK

FRAME CLOCK

CCDOUT

Serial

Interface

CCD INPUT

VSP1221

SLES012A – SEPTEMBER 2001 – REVISED JULY 2004

Figure 9. Application Diagram of the VSP1221

NOTE:

The application circuits shown are typical examples of the operation of the devices.

Texas Instruments cannot assume responsibility for any problems arising out of the

use of these circuits or for any infringement of third-pary patents and other rights due

to the same.

The CCD output may need an off-chip external buffer in order to drive the input capacitive load of the VSP1221.

The buffer output is applied to DIN (pin 30) through an ac-coupling capacitor. It is advisable to connect PIN (pin

31) to the buffer ground through a similar ac-coupling capacitor for the following reason: since the input stage of

the VSP1221 is differential, the input to the CDS is the voltage difference between DIN and PIN. Hence, if the

noise path for DIN and PIN are similar, the noise can be effectively cancelled. This is not the case if the noise

paths are different. However, PIN can also be connected directly to ground.In this case, bit SD8 (CLAMPPIN) of

the control register should be 1 (see the control register section). If PIN is connected to an ac-coupling capacitor,

it is recommended to set bit SD8 (CLAMPPIN) of the control register to 0 so that the ac-coupling capacitor is

charged to a fixed clamp voltage. The recommended value for the ac coupling capacitor is 0.22 µF.

19