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VSP1221 датащи(PDF) 5 Page - Texas Instruments

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номер детали VSP1221
подробное описание детали  12-BIT, 21-MSPS, ULTRALOW-POWER CCD SIGNAL PROCESSOR
PDF  26 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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VSP1221 датащи(HTML) 5 Page - Texas Instruments

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ELECTRICAL CHARACTERISTICS (CONTINUED)
VSP1221
SLES012A – SEPTEMBER 2001 – REVISED JULY 2004
DEVICE SPECIFICATIONS
All typical specifications are at T
A = 25°C, all power supply voltages = 3 V, and conversion rate = 21 MHz, unless otherwise
stated. All maximum specifications are assured across operating temperature and voltage ranges.
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
FULL CHANNEL
Input signal level for full-scale output
Single ended, gain = 0 dB
1000
mV
Input capacitance
8
pF
Input referred noise
Gain = 0 dB
130
360
µV
Integral nonlinearity
Gain = 0 dB
±1.5
±2
±5
LSB
Differential nonlinearity
Gain = 0 dB
±0.5 ±0.75 +1.5/-1
LSB
Data latency
10
Clocks
Conversion rate
21
MHz
PGA
Gain control code
10
Bits
Maximum gain
Gain code = 1011010000 (720 Decimal)
36
dB
Minimum gain
Gain code = 0000000000
0
dB
Gain resolution
0.05
dB
Integral nonlinearity
±0.02 ±0.05
±0.4
dB
Differential nonlinearity
±0.02 ±0.05
±0.3
dB
ANALOG-TO-DIGITAL CONVERTER (ADC)
Resolution
12
Bits
Conversion rate
21
MHz
No missing codes
Integral nonlinearity
±1
LSB
Differential nonlinearity
±0.5
LSB
3.5
Data latency
Clocks
(fixed)
GENERAL-PURPOSE DIGITAL-TO-ANALOG CONVERTER (DAC)
Resolution
8
Bits
Integral nonlinearity
±0.1
±1
LSB
Differential nonlinearity
±0.1
±1
LSB
Output voltage range
0
AVDD
V
Output settling time
10-pF external load. Settle to 1 mV
4
µs
SERIAL INTERFACE
Clock frequency (SCLK)
DIVDD = 3 V
40
MHz
OPTICAL-BLACK CALIBRATION
Maximum correctable CCD black level
100
mV
Convergence time
Black level = 100 mV, gain = 12 dB, OB reference level = 0
440
550
Clocks
Gain = 0-20dB
±1
±2
Gain = 20-26 dB
±1
±4
Calibration error
LSB
Gain = 26-32 dB
±2
±4
Gain = 32-36 dB
±4
±8
5



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