STA400A datasheet(60/117 Pages) STMICROELECTRONICS

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STA400A

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FfEst_M

- Actual Fine Frequency Value

The register provides the current value of the fine frequency contribution to the NCO increment. The value is in

2’s complement with a resolution of 5.703 Hz per LSB.

MctlEn_M

- MCM Demodulator Control

MCM Control is enabled if his register is set to ‘1’, disabled if set to ‘0’. The reset value enables this block.

MctlMask_M

- MCM Demodulator Control Mask

This register is a mask vector for internal state transitions and output control signals of MCM Control. The output

signals are masked out, i.e. set to logic 0, when the corresponding output mask bit (bits 0,1 or 2) is set to 0. By

default the outputs are not masked. If transition mask 2 (bit 5) is set to 0, signal full_avg_len of the MCM CF

Averager is taken as is, otherwise it is internally forced to 1. If transition mask 1 (bit 4) is set to 0, the transition

from state NO_UPDATE to TDM_LOCK of MCM Control is disabled. By default it is enabled. If transition mask

0 (bit 3) is set to 0, the transition from state NO_UPDATE to FS_LOCK of MCM Control is disabled. By default

it is enabled. Setting bits 3 and 4 to ‘0’ means that after entering the state NO_UPDATE this state is not left

except when forced by a block disable (reg. 0x180 set to 0) or an external initialization (reg 0x182 set to 1).

b5:

full_avg_len

b4:

tdm_lock

b3:

fs_lock

b2:

timeout_disa

b1:

fc_noup

b0:

fs_init

Type:

MultiBytes - R

Word Length:

Byte Name

Address (Hex)

Bit Map

Reset Value (Hex)

FfEst3_M

0172

FfEst2_M

0171

15-8

FfEst1_M

0170

7-0

Type:

SingleByte - R/W

Word Length:

Byte Name

Address (Hex)

Bit Map

Reset Value (Hex)

MctlEn_M

0180

Type:

SingleByte - R/W

Word Length:

Byte Name

Address (Hex)

Bit Map

Reset Value (Hex)

MctlMask_M

0181

5-0

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