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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STA400A датащи(PDF) 85 Page - STMicroelectronics |
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STA400A датащи(HTML) 85 Page - STMicroelectronics |
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85 / 117 page  85/117 STA400A ‘1’= FEC Preprocessing operational b2 : RS Input Control ‘0’= RS Input Control inactive ‘1’= RS Input Control operational b1 : Viterbi Decoder ‘0’= VD inactive ‘1’= VD operational b0 : FEC Management ‘0’= FEC Management inactive ‘1’= FEC Management operational ErrorCtrl_F - FEC Error Register b5-b0 : 0x00 -> Asynchronous status overwrite for each PRC proceed 0x01 -> Update FEC error registers with TSCC1 status only 0x02 -> Update FEC error registers with TSCC2 status only 0x03 -> Update FEC error registers with 1st PRC packet after TSCCs ... 0x32 -> Update FEC error registers with 48th PRC packet after TSCCs x33-0x3F -> Undefined InitState_F - Convolutional Decoder Initial State Control Register Initial state of convolutional decoder after training sequence, which corresponds to the reverse of the last 6 bits of the PRC preamble 1D(hex)=00011101 -> 101110 = 2E(hex)=46(dec). InitLfsr_F - Viterbi Decoder LFSR Initial State Type: SingleByte - R/W Word Length: 6 Byte Name Address (Hex) Bit Map Reset Value (Hex) ErrorCtrl_F 0302 5-0 01 Type: SingleByte - R/W Word Length: 6 Byte Name Address (Hex) Bit Map Reset Value (Hex) InitState_F 0307 5-0 2E Type: MultiBytes - R/W Word Length: 12 Byte Name Address (Hex) Bit Map Reset Value (Hex) InitLfsr2_F 0309 11-8 0C InitLfsr1_F 0308 7-0 CC |
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