STA400A datasheet(17/117 Pages) STMICROELECTRONICS

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STA400A

Carrier Loop Filter

The carrier loop filter is a first order IIR filter with two programmable parameters, one for the proportional and

the other for the integral correction, as shown in fig. 6. The output of the integrator, that produces a frequency

control term, is summed with the weighted phase error in the proportional path and then sent to the Carrier NCO

to close the carrier tracking loop.

The proportional gain alpha and the integral gain beta of the filter are configured by the registers ALFACAR and

BETACAR respectively. The integral gain is set by a mantissa and exponent as given by:

beta = beta_m x 2(beta_e)

where beta_m, the mantissa, is a 5-bit integer value set in the five LSBs of the BETACAR register (beta_m=BE-

TACAR[4:0]) and beta_e, the exponent, is a 3-bit integer set in the three MSBs of the BETACAR register

(beta_e=BETACAR[7:5]).

The proportional gain is an integer value set in the ALFACAR register with a range from 0 to 255 (alpha=ALFA-

CAR[7:0]). The CARINTG register collects the 8 MSBs of the filter integrator and may be read or written at any

time by the system controller. When the register is written, the integrator LSBs are reset. The filter integrator is

saturated to 21-bit by the LIMITER block resulting in a maximum peak-to-peak frequency range of 373KHz (with

FMCLK = 23.92MHz).

Carrier Loop Equations

The carrier loop is fully digital and comprises two blocks working at symbol rate: the Phase/Frequency Error

Detector and the Loop Filter, and two blocks working at clock rate: the Carrier NCO and the I/Q Mixer (see fig.6).

The loop is parametrised by the coefficients alpha and beta given in the registers ALFACAR and BETACAR

respectively. The carrier loop is a second order loop whose natural frequency fn and damping factor ξ may be

calculated applying the following formulas:

where alpha is set in the ALFACAR register and beta in the BETACAR register, Kd is the PFD gain as shown

in fig.10 and m is the reference level of the AGC2 loop (see AGC2REF register).

For example, to set the loop natural frequency to 1.3KHz with the default value for m=AGC2REF (90dec, 5Ahex)

and Kd = 1.24 (noise free value), the above equation solved for beta gives:

alpha can be chosen to have a damping factor equal to 0.7:

The register ALFACAR can be programmed with 23 (Dec) and the register BETACAR can be programmed with

the parameter BETA_E=0 and BETA_M=21 (Dec).

Frequency Sweep

When the frequency offset is greater than the pull-in range of the carrier loop or in presence of low signal to

noise ratio the tracking performance of the loop itself may became rather slow. To help the loop in tracking this

frequency offset an internal frequency sweep generator can be enabled via IIC-bus. The output of this block is

summed to the frequency register of the I/Q Mixer and operates only during the carrier acquisition. The sweep

is stopped by the lock detector when the carrier lock condition is reached (see fig.6).

The sweep rate is given by the following formula:

26.96 m K

d b e t a

[Hz]

0.01322 alpha

beta

-------------

be ta

726.84m K

-------------------------------

20.83

al pha

0.01322

--------------------- beta

-------------

22.87

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