STA400A datasheet(64/117 Pages) STMICROELECTRONICS

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STA400A

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IrqStatus_M

- MCM Demodulator Interrupt Status

Bit 0 is set if the Frequency Control is enabled (cf. bit 6 of Enable_M) and the frequency lock indicator has

changed from LOCK to NO LOCK (cf. bit 9 of status_M). This bit is set if the Frame Sync is enabled (cf. bit 3 of

Enable_M) and the it’s state has changed from SYNC to HUNT (cf. bit 3-2 of Status_M).

b1 :

frequency unlock

b0 :

frame sync unlock

2.4 TDM (Section 1)

TdmEnable_S - Satellite TDM Decoding Block Enable

b7 :

sat2_tfm_en

enable sub-block satellite two TDM FIFO management

b6 :

sat2_td_en

enable sub-block satellite two TDM de-scrambling

b5 :

sat2_qmg_en

enable sub-block satellite two QPSK metric generation

b4 :

sat2_ts_en

enable sub-block satellite two TDM synchronization

b3 :

sat1_tfm_en

enable sub-block satellite one TDM FIFO management

b2 :

sat1_td_en

enable sub-block satellite one TDM de-scrambling

b1 :

sat1_qmg_en

enable sub-block satellite one QPSK metric generation

b0 :

sat1_ts_en

enable sub-block satellite one TDM synchronization

TdmSync_S1 - Satellite One TDM Decoding Synchronization Data Control T

b4 :

fsm_fallback

b3 :

invert_data_out

b2 :

invert_data_in

b1 :

iq_swap_data_out

b0 :

iq_swap_data_in

Type:

SingleByte - INT

Word Length:

Byte Name

Address (Hex)

Bit Map

Reset Value (Hex)

IrqStatus_M

01C1

1-0

Type:

SingleByte - R/W

Word Length:

Byte Name

Address (Hex)

Bit Map

Reset Value (Hex)

TdmEnable_S

0200

7-0

Type:

SingleByte - R/W

Word Length:

Byte Name

Address (Hex)

Bit Map

Reset Value (Hex)

TdmSync_S1

0204

4-0

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