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DP8430V датащи(PDF) 45 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали DP8430V
подробное описание детали  microCMOS Programmable 256k/1M/4M Dynamic RAM Controller/Drivers
PDF  56 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8430V датащи(HTML) 45 Page - National Semiconductor (TI)

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130 AC Timing Parameters (Continued)
Unless otherwise stated VCC e 50V g10% 0 C k TA k 70 C the output load capacitance is typical for 4 banks of 18 DRAMs
per bank including trace capacitance (Note 2)
Two different loads are specified
CL e 50 pF loads on all outputs except
CL e 150 pF loads on Q0–8 9 10 and WE or
CH e 50 pF loads on all outputs except
CH e 125 pF loads on RAS0–3 and CAS0–3 and
CH e 380 pF loads on Q0–8 9 10 and WE
Refresh Parameter
DP8430V31V32V-33
Number
Symbol
Description
CL
CH
Min
Max
Min
Max
200
tSRFCK
RFSH Asserted Setup to CLK High
16
16
201
tSDRFCK
DISRFSH Asserted Setup to CLK High
16
16
202
tSXRFCK
EXTENDRF Setup to CLK High
8
8
204
tPCKRFL
CLK High to RFIP Asserted
26
26
205
tPARQRF
AREQ Negated to RFIP Asserted
38
38
206
tPCKRFH
CLK High to RFIP Negated
41
41
207
tPCKRFRASH
CLK High to Refresh RAS Negated
26
30
208
tPCKRFRASL
CLK High to Refresh RAS Asserted
20
24
209a
tPCKCL0
CLK High to CAS Asserted
during Error Scrubbing
64
73
(tRAH e 15 ns tASC e 0 ns)
209b
tPCKCL1
CLK High to CAS Asserted
during Error Scrubbing
74
83
(tRAH e 15 ns tASC e 10 ns)
209c
tPCKCL2
CLK High to CAS Asserted
during Error Scrubbing
74
83
(tRAH e 25 ns tASC e 0 ns)
209d
tPCKCL3
CLK High to CAS Asserted
during Error Scrubbing
85
94
(tRAH e 25 ns tASC e 10 ns)
210
tWRFSH
RFSH Pulse Width
9
9
211
tPCKRQL
CLK High to RFRQ Asserted
22
22
212
tPCKRQH
CLK High to RFRQ Negated
22
22
TLF11118 – 59
FIGURE 37 200 Refresh Timing
45



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