September 5, 2002
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
11
Figure 1: Block Diagram ............................................................................................................................13
Figure 2: CY8C25122 ................................................................................................................................15
Figure 3: CY8C26233 ................................................................................................................................15
Figure 4: 26443 PDIP/SOIC/SSOP ...........................................................................................................16
Figure 5: 26643 TQFP ...............................................................................................................................17
Figure 6: 26643 PDIP/SSOP .....................................................................................................................18
Figure 7: General Purpose I/O Pins ..........................................................................................................30
Figure 8: External Crystal Oscillator Connections .....................................................................................37
Figure 9: PSoC MCU Clock Tree of Signals ..............................................................................................39
Figure 10: Interrupts Overview ..................................................................................................................43
Figure 11: GPIO Interrupt Enable Diagram ...............................................................................................47
Figure 12: Digital Basic and Digital Communications PSoC Blocks ..........................................................49
Figure 13: Polynomial LFSR ......................................................................................................................65
Figure 14: Polynomial PRS .......................................................................................................................65
Figure 15: SPI Waveforms ........................................................................................................................68
Figure 16: Array of Analog PSoC Blocks ...................................................................................................72
Figure 17: NMux Connections ...................................................................................................................76
Figure 18: PMux Connections ...................................................................................................................77
Figure 19: RBotMux Connections ..............................................................................................................77
Figure 20: Analog Continuous Time PSoC Blocks ....................................................................................79
Figure 21: Analog Switch Cap Type A PSoC Blocks .................................................................................84
Figure 22: AMux Connections ...................................................................................................................85
Figure 23: CMux Connections ...................................................................................................................85
Figure 24: BMuxSCA/SCB Connections ...................................................................................................86
Figure 25: Analog Switch Cap Type B PSoC Blocks .................................................................................93
Figure 26: Analog Input Muxing ...............................................................................................................101
Figure 27: Analog Output Buffers ............................................................................................................103
Figure 28: Multiply/Accumulate Block Diagram .......................................................................................108
Figure 29: Decimator Coefficients ...........................................................................................................110
Figure 30: Execution Reset .....................................................................................................................113
Figure 31: Three Sleep States .................................................................................................................115
Figure 32: Switch Mode Pump ................................................................................................................117
Figure 33: Programming Wave Forms ....................................................................................................122
Figure 34: PSoC Designer Functional Flow ............................................................................................123
Figure 35: CY8C25xxx/CY8C26xxx Voltage Frequency Graph ..............................................................125
Figure 36: 44-Lead Thin Plastic Quad Flat Pack A44 .............................................................................141
Figure 37: 20-Pin Shrunk Small Outline Package O20 ...........................................................................142
Figure 38: 28-Lead (210-Mil) Shrunk Small Outline Package O28 .........................................................143
Figure 39: 48-Lead Shrunk Small Outline Package O48 .........................................................................143
Figure 40: 20-Lead (300-Mil) Molded DIP P5 ..........................................................................................144
Figure 41: 28-Lead (300-Mil) Molded DIP P21 ........................................................................................144
Figure 42: 48-Lead (600-Mil) Molded DIP P25 ........................................................................................144
Figure 43: 20-Lead (300-Mil) Molded SOIC S5 .......................................................................................145
Figure 44: 28-Lead (300-Mil) Molded SOIC S21 .....................................................................................145
Figure 45: 8-Lead (300-Mil) Molded DIP .................................................................................................146
List of Figures
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