Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
92
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002
10.10 Analog Switch Cap Type B PSoC Blocks
10.10.1
Introduction
The Analog Switch Cap Type B PSoC blocks are built
around an operational amplifier. There are several ana-
log muxes that are controlled by register-bit settings in
the control registers that determine the signal topology
inside the block. There are also four arrays of unit value
capacitors that are located in the feedback path for the
op-amp, and are switched by two phase clocks, PHI1
and PHI2. These four capacitor arrays are labeled A Cap
Array, B Cap Array, C Cap Array, and F Cap Array. There
is also an analog comparator connected to the output
OUT, which converts analog comparisons into digital sig-
nals.
There are three discrete outputs from this block. These
outputs are:
1.
The analog output bus (ABUS), which is an analog
bus resource that is shared by all of the analog
blocks in the analog column for that block.
2.
The comparator bus (CBUS), which is a digital bus
that is a resource that is shared by all of the analog
blocks in a column for that block.
3.
The output bus (OUT), which is an analog bus
resource that is shared by all of the analog blocks in
a column and connects to one of the analog output
buffers, to send a signal externally to the device.
The SCB block also supports Delta-Sigma, Successive
Approximation and Incremental A/D Conversion, Capaci-
tor DACs, and SC filters. It has two input arrays of
switched capacitors, and a Non-Switched capacitor feed-
back array from the output. When preceded by an SC
Block A Integrator, the combination can be used to pro-
vide a full Switched Capacitor Biquad.
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
