Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
88
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002
10.9.3.2
Analog Switch Cap Type A Block xx Control 1 Register
ACMux controls the input muxing for both the A and C
capacitor branches. The high order bit, ACMux[2],
selects one of two inputs for the C branch. However,
when the bit is high, it also overrides the two low order
bits, forcing the A and C branches to the same source.
The resulting condition is used to construct low pass
biquad filters.
The BCap bits set the value of the capacitor in the B
path.
Analog Switch Cap Type A Block 10 Control 1 Register (ASA10CR1, Address = Bank 0/1, 81h)
Analog Switch Cap Type A Block 12 Control 1 Register (ASA12CR1, Address = Bank 0/1, 89h)
Analog Switch Cap Type A Block 21 Control 1 Register (ASA21CR1, Address = Bank 0/1, 95h)
Analog Switch Cap Type A Block 23 Control 1 Register (ASA23CR1, Address = Bank 0/1, 9Dh)
Table 69:
Analog Switch Cap Type A Block xx Control 1 Register
Bit #
7
6
5
4
3
2
1
0
POR
0
0
0
0
0
0
0
0
Read/
Write
RW
RW
RW
RW
RW
RW
RW
RW
Bit Name
ACMux[2]
ACMux[1]
ACMux[0]
BCap[4]
BCap[3]
BCap[2]
BCap[1]
BCap[0]
Bit [7:5] ACMux [2:0]
Encoding for selecting A and C inputs. (Note that available mux inputs vary by individual
PSoC block.)
ASA10
A Inputs C Inputs
0 0 0 = ACA00 ACA00
0 0 1 = ASB11 ACA00
0 1 0 = REFHI ACA00
0 1 1 = ASB20 ACA00
1 0 0 = ACA01Reserved
1 0 1 = Reserved Reserved
1 1 0 = Reserved Reserved
1 1 1 = Reserved Reserved
ASA21
A Inputs C Inputs
ASB11
ASB11
ASB20
ASB11
REFHI
ASB11
Vtemp
ASB11
ASA10
Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved
ASA12
A Inputs C Inputs
ACA02
ACA02
ASB13
ACA02
REFHI
ACA02
ASB22
ACA02
ACA03
Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved
ASA23
A Inputs C Inputs
ASB13
ASB13
ASB22
ASB13
REFHI
ASB13
ABUS3
ASB13
ASA12
Reserved
Reserved Reserved
Reserved Reserved
Reserved Reserved
Bit [4:0]
: BCap [4:0] Binary encoding for 32 possible capacitor sizes for B Capacitor:
0 0 0 0 0 = 0 Capacitor units in array
0 0 0 0 1 = 1 Capacitor units in array
0 0 0 1 0 = 2 Capacitor units in array
0 0 0 1 1 = 3 Capacitor units in array
0 0 1 0 0 = 4 Capacitor units in array
0 0 1 0 1 = 5 Capacitor units in array
0 0 1 1 0 = 6 Capacitor units in array
0 0 1 1 1 = 7 Capacitor units in array
0 1 0 0 0 = 8 Capacitor units in array
0 1 0 0 1 = 9 Capacitor units in array
0 1 0 1 0 = 10 Capacitor units in array
0 1 0 1 1 = 11 Capacitor units in array
0 1 1 0 0 = 12 Capacitor units in array
0 1 1 0 1 = 13 Capacitor units in array
0 1 1 1 0 = 14 Capacitor units in array
0 1 1 1 1 = 15 Capacitor units in array
1 0 0 0 0 = 16 Capacitor units in array
1 0 0 0 1 = 17 Capacitor units in array
1 0 0 1 0 = 18 Capacitor units in array
1 0 0 1 1 = 19 Capacitor units in array
1 0 1 0 0 = 20 Capacitor units in array
1 0 1 0 1 = 21 Capacitor units in array
1 0 1 1 0 = 22 Capacitor units in array
1 0 1 1 1 = 23 Capacitor units in array
1 1 0 0 0 = 24 Capacitor units in array
1 1 0 0 1 = 25 Capacitor units in array
1 1 0 1 0 = 26 Capacitor units in array
1 1 0 1 1 = 27 Capacitor units in array
1 1 1 0 0 = 28 Capacitor units in array
1 1 1 0 1 = 29 Capacitor units in array
1 1 1 1 0 = 30 Capacitor units in array
1 1 1 1 1 = 31 Capacitor units in array
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