PSOC datasheet(89/148 Pages) CYPRESS

89 / 148 page

Analog PSoC Blocks

September 5, 2002

Document #: 38-12010 CY Rev. ** CMS Rev. 3.20

10.9.3.3

Analog Switch Cap Type A Block xx Control 2 Register

AnalogBus gates the output to the analog column bus.

The output on the analog column bus is affected by the

state of the ClockPhase bit in Control 0 Register

(ASA10CR0, ASA12CR0, ASA21CR0, ASA23CR0). If

AnalogBus is set to 0, the output to the analog column

bus is tri-stated. If AnalogBus is set to 1, the signal that is

output to the analog column bus is selected by the

ClockPhase bit. If the ClockPhase bit is 0, the block out-

put is gated by sampling clock on last part of PHI2. If the

ClockPhase bit is 1, the block output continuously drives

the analog column bus.

CompBus controls the output to the column comparator

bus. Note that if the comparator bus is not driven by any-

thing in the column, it is pulled low. The comparator out-

put is evaluated on the rising edge of internal PHI1 and

is latched so it is available during internal PHI2.

AutoZero controls the shorting of the output to the invert-

ing input of the op-amp. When shorted, the op-amp is

basically a follower. The output is the op-amp offset. By

using the feedback capacitor of the integrator, the block

can memorize the offset and create an offset cancella-

tion scheme. AutoZero also controls a pair of switches

between the A and B branches and the summing node of

the op-amp. If AutoZero is enabled, then the pair of

switches is active. AutoZero also affects the function of

the FSW1 bit in Control 3 Register.

The CCap bits set the value of the capacitor in the C

path.

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