MEC1322 datasheet(269/456 Pages) MICROCHIP

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DS00001719D-page 269

MEC1322

4:3 STATUS

This is a status signal. The status decode is listed in priority order

with the highest priority first.

3: Error detected by the DMA

2: The DMA Channel is externally done, in that the Device has termi-

nated the transfer over the Hardware Flow Control through the

Port dma_term

1: The DMA Channel is locally done, in that Memory Start Address

equals Memory End Address

0: DMA Channel Control:Run is Disabled (0x0)

Note:

This functionality has been replaced by the Interrupt field,

and as such should never be used.

The field will not flag back appropriately timed status, and

if used may cause the firmware to become out-of-sync

with the hardware.

This field has multiple non-exclusive statuses, but may

only display a single status. As such, multiple statuses

may be TRUE, but this will appear as though only a single

status has been triggered.

R0h

RESET

2DONE

This is a status signal. It is only valid while DMA Channel Con-

trol:Run

is Enabled. This is the inverse of the DMA Channel Con-

trol:Busy

field, except this is qualified with the DMA Channel

Control:Run

field.

1=Channel is done

0=Channel is not done or it is OFF

RESET

1REQUEST

This is a status field.

1= There is a transfer request from the Master Device

0= There is no transfer request from the Master Device

RESET

0 RUN

This is a control field.

Note:

This bit only applies to Hardware Flow Control mode.

1= This channel is enabled and will service transfer requests

0=This channel is disabled. All transfer requests are ignored

RESET

Offset

10h

Bits

Description

Type

Default

Reset

Event

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