RF64 datasheet(60/76 Pages) ETC2

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ADVANCED COMMUNICATIONS & SENSING

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RF64

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6.3. Interrupt Configuration Parameters - IRQParam

The detailed description of the IRQParam register is given in Table 28.

Table 28: IRQParam Register Description

Name

Bits

Address

(d)

Description

Fifo_size

7-6

r/w

Configures the size of the FIFO:

00 -> 16 bytes (d)

01 -> 32 bytes

10 -> 48 bytes

11 -> 64 bytes

Fifo_thresh

5-0

r/w

Number of bytes to be written in the FIFO to activate the

Fifo_threshold interrupts

Actual number of bytes = B + 1, where B is the value in the register.

(d): B = 001111 => Number of bytes = 16

Rx_stby_irq_0

7-6

r/w

IRQ_0 source in Rx and Standby modes:

If Data_mode(1:0) = 00 (Continuous mode):

00 => Sync (d)

01=> RSSI

10 => Sync

11=> Sync

If Data_mode(1:0) = 01 (Buffered mode):

00 => - (d)

01=> Write_byte

10=> /Fifoempty*

11 Sync

If Data_mode(1:0) = 1x (Packet mode):

00=> Payload_ready (d)

01 => Write_byte

10=> /Fifoempty*

11 => Sync or Adrs_match (the latter if address filtering is enabled)

*also available in Standby mode (Cf sections 5.4.4 and 5.5.7)

Rx_stby_irq_1

5-4

r/w

IRQ_1 source in Rx and Standby modes:

If Data_mode(1:0) = 00 (Continuous mode):

xx =>DCLK

If Data_mode(1:0) = 01 (Buffered mode):

00=> - (d)

01=> Fifofull*

10=> RSSI

11=> Fifo_threshold*

If Data_mode(1:0) = 1x (Packet mode):

00=> CRC_ok (d)

01=> Fifofull*

10 => RSSI

11=> Fifo_threshold*

*also available in Standby mode (Cf sections 5.4.4 and 5.5.7)

Tx_start_irq_0

r/w

Tx start condition and IRQ_0 source:

0 => Start transmission when the number of bytes in FIFO is greater than or

equal to the threshold set by MCParam_Fifo_thresh parameter (Cf section

5.2.2.3), IRQ_0 mapped to Fifo_threshold (d)

1 => Tx starts if FIFO is not empty, IRQ_0 mapped to /Fifoempty

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