RF64 datasheet(22/76 Pages) ETC2

номер детали	RF64

подробное описание детали	ADVANCED COMMUNICATIONS & SENSING

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ADVANCED COMMUNICATIONS & SENSING

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RF64

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Reg_PA

Rx_on

LNA

3.3.7.3. Suggested PA Biasing and Matching

The recommended PA bias and matching circuit is illustrated below:

VR_PA

47nF

100nH

RFIO

SAW

DC block

Antenna

port

Low-pass and DC block

Figure 12: Recommended PA Biasing and Output Matching

Please refer to section 7.5.3 of this document for the optimized matching arrangement for each frequency band.

3.3.8. Common Input and Output Front-End

The receiver and the transmitter share the same RFIO pin (pin 32). Figure 13 below shows the configuration of the

common RF front-end.



In transmit mode, the PA and the PA regulator are active, with the voltage on the VR_PA pin equal to the

nominal voltage of the regulator (1.8 V). The external inductance is used to bias the PA.



In receive mode, both PA and PA regulator are off and VR_PA is tied to ground. The external inductance LT1

is then used to bias the LNA.

VR_PA

RFIO

Figure 13: Front-end Description

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