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LXT970ATC датащи(PDF) 72 Page - Intel Corporation |
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LXT970ATC датащи(HTML) 72 Page - Intel Corporation |
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72 / 74 page ![]() LXT970A — Dual-Speed Fast Ethernet Transceiver 72 Datasheet 19.2 100BASE-FX 1 = Enable 100BASE fiber interface. 0 = Enable 100BASE twisted-pair interface. R/W Note 6 19.1 Reserved Write as 0; Ignore on read. R/W 0 19.0 Transmit Disconnect 1 = Disconnect TP transmitter from line. 0 = Normal operation. R/W 0 Table 56. Chip Status Register (Address 20, Hex 14) Bit Name Description Type 1 Default 20.15:1 4 Reserved Ignore on read. RO N/A 20.13 Link 1 = Link is up. 0 = Link is down. Link bit 20.13 is a duplicate of bit 1.2, except that it is a dynamic indication, whereas bit 1.2 latches Low. RO 0 20.12 Duplex Mode 1 = Full-duplex. 0 = Half-duplex. RO Note 2 20.11 Speed 1 = 100 Mbps operation. 0 = 10 Mbps operation. RO Note 2 20.10 Reserved Ignore on read. RO N/A 20.9 Auto-Negotiation Complete 1 = Auto-negotiation process complete. 0 = Auto-negotiation process not complete. Auto-Negotiation Complete bit 20.9 is a duplicate of bit 1.5. RO/LH 0 20.8 Page Received 1 = Three identical and consecutive link code words have been received. 0 = Three identical and consecutive link code words have not been received. Page Received bit 20.8 is a duplicate of bit 6.1 RO/LH 0 20:7 Reserved Ignore on read. RO 0 20.6 Reserved Ignore on read. RO 0 20.5 Reserved Ignore on read. RO N/A 20.4 Reserved Ignore on read. RO N/A 20.3 Reserved Ignore on read. RO N/A 20.2 Low-Voltage 1 = Low-voltage fault on VCC has occurred. 0 = No fault. RO N/A 20.1 Reserved Ignore on read. RO N/A 20.0 Reserved Ignore on read. RO N/A 1. RO = Read Only LH = Latching High (This bit remains High until read, and then returns Low). 2. Bits 20.12 and 20.11 reflect the current operating mode of the LXT970A. Table 55. Configuration Register (Address 19, Hex 13) (Continued) Bit Name Description Type 1 Default 1. R/W = Read/Write 2. The default value of bit 19.13 is determined by pin MF1. 3. If auto-negotiation is disabled, the default value of bit 19.8 is determined by pin CFG1. If auto-neg is enabled, the default value of bit 19.8 = 0. 4. The default value of bit 19.4 is determined by pin MF2 Operation. 5. The default value of bit 19.3 is determined by pin MF3 Operation. 6. If auto-negotiation is disabled, default value of bit 19.2 is determined by pin MF4. If auto-negotiation is enabled, default value of bit 19.2 = 0. |
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