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LXT970ATC датащи(PDF) 57 Page - Intel Corporation |
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LXT970ATC датащи(HTML) 57 Page - Intel Corporation |
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57 / 74 page ![]() Dual-Speed Fast Ethernet Transceiver — LXT970A Datasheet 57 Figure 28. MII - 10BASE-T Receiving Timing Table 37. MII - 10BASE-T Receive Timing Parameters Parameter Sym Min Typ 1 Max Units2 RXD, RX_DV, RX_ER Setup to RX_CLK High t7A 10 –– ns RXD, RX_DV, RX_ER Hold from RX_CLK High t7B 10 –– ns TPI in to RXD out (Rx latency) t7C –– 733 BT CRS asserted to RXD, RX_DV, RX_ER asserted t7D 0 – 693 BT RXD, RX_DV, RX_ER de-asserted to CRS de-asserted t7E 0 2.5 - 5.5 6 BT TPI in to CRS asserted t7F 0 4 5 BT TPI quiet to CRS de-asserted t7G 0 18 19 BT TPI in to COL asserted t7H 0 4 5 BT TPI quiet to COL de-asserted t7I 0 18 19 BT 1. Typical values are at 25 °C and are for design aid only; not guaranteed and not subject to production testing. 2. BT is the duration of one bit as transferred to and from the MAC and is the reciprocal of the bit rate. 10BASE-T bit time = 10- 7 s or 100 ns. 3. CRS is asserted. RXD/RX_DV are driven at the start of SFD (64 BT). RX_CLK RXD, RX_DV, RX_ER CRS TPI t7C t7D t7B t7F t7A t7G t7E COL t7H t7I |
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