LXT970ATC datasheet(44/74 Pages) INTEL

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LXT970A — Dual-Speed Fast Ethernet Transceiver

Datasheet

3.3.5.2

Fiber

The fiber interface consists of a pseudo-ECL transmit and receive pair to an external fiber optic

transceiver. The transmit pair should be AC-coupled to the transceiver, and biased to 3.7V with a

Ω equivalent impedance. The receive pair can be DC-coupled, and should be biased to 3.0V with

a 50

Ω equivalent impedance. Figure 21 on page 46 shows the correct bias networks to achieve

these requirements.

The following guidelines apply to when laying out any differential pair:

• Space both members close together allowing nothing to come between them.

• Keep distances as short as possible, both traces should have the same length.

• Avoid layer changes as much as possible.

• Keep termination circuits close together and on the same side of the board.

• Always put termination circuits close to the source end of any circuit.

3.3.6

Interface for the MII

3.3.6.1

Transmit Hold Time Adjustment

Transmit hold time for TXD, TX_EN, and TX_ER from TX_CLK High is currently specified in

Table 32, Table 34, Table 36, and Table 38 as 5 ns minimum. 0 ns minimum is the IEEE

specification. Depending on the specification of the MAC or ASIC used in your design, you may or

may not need to account for this in your PC board design.

If you determine that a timing adjustment is required, there are a couple of recommended ways to

do this.

• If using series resistors in the TXD lines, increase the value of the resistors to achieve the

necessary delay.

• An alternative method is to add the appropriate delay in the TX_CLK line. Depending on the

amount of delay required, this may be accomplished with a series resistor or by adding a buffer

to the TX_CLK line.

Note that some delay is introduced by the actual PC board traces themselves.

3.3.6.2

MII Terminations

When the LXT970A is configured with high-strength MII driver levels (bit 17.3 = 0), 55

Ω series

termination resistors are recommended on all MII output signals to avoid undershoot and

overshoot.

When 17.3 = 1, the MI driver levels are reduced by a factor of ten and termination resistors are not

required on the MII outputs.

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