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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LXT970ATC датащи(PDF) 69 Page - Intel Corporation |
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LXT970ATC датащи(HTML) 69 Page - Intel Corporation |
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69 / 74 page  Dual-Speed Fast Ethernet Transceiver — LXT970A Datasheet 69 Table 51. Auto Negotiation Expansion (Address 6) Bit Name Description Type 1 Default 6.15:5 Reserved Ignore. RO 0 6.4 Parallel Detection Fault 1 = Parallel detection fault has occurred. 0 = Parallel detection fault has not occurred. RO/ LH 0 6.3 Link Partner Next Page Able 1 = Link partner is next page able. 0 = Link partner is not next page able. RO 0 6.2 Next Page Able Not Supported. RO 0 6.1 Page Received 1 = 3 identical and consecutive link code words have been received from link partner. 0 = 3 identical and consecutive link code words have not been received from link partner. RO/ LH 0 6.0 Link Partner Auto Neg Able 1 = Link partner is auto-negotiation able. 0 = Link partner is not auto-negotiation able. RO 0 1. RO = Read Only LH = Latching High (This bit remains High until read, and then returns Low). Table 52. Mirror Register (Address 16, Hex 10) Bit Name Description Type 1 Default 16.15:0 User Defined This register is intended for use in checking the MII serial port and has no effect on chip operation. R/W 0 1. R/W = Read /Write |
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