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LXT970ATC датащи(PDF) 71 Page - Intel Corporation |
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LXT970ATC датащи(HTML) 71 Page - Intel Corporation |
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71 / 74 page ![]() Dual-Speed Fast Ethernet Transceiver — LXT970A Datasheet 71 Table 55. Configuration Register (Address 19, Hex 13) Bit Name Description Type 1 Default 19.15 Reserved Write as 0; ignore on read. R/W N/A 19.14 Txmit Test (100BASE-TX) 1 = 100BASE-T transmit test enabled, LXT970A transmits data regardless of link status. This function is the analog of the link test function (19.8) for 100BASE-TX. 0 = Normal operation. R/W 0 19.13 Repeater Mode 1 = Enable Repeater Mode. 0 = Enable DTE Mode. R/W Note 2 19.12 MDIO_INT 1 = Enable interrupt signaling on MDIO (if 17.1 = 1). 0 = Normal operation (MDIO Interrupt disabled). Bit is ignored unless the interrupt function is enabled (17.1 = 1). R/W 0 19.11 TP Loopback (10BASE-T) 1 = Disable 10BT TP Loopback. Data transmitted by the MAC will not loopback to the RXD, RX_DV, and CRS pins. 0 = Enable 10BT TP Loopback - Preamble, SFD, and data are directly looped back to the MII. R/W 0 19.10 SQE (10BASE-T) 1 = Enable SQE. 0 = Disable SQE (Default). R/W 0 19.9 Jabber (10BASE-T) 1 = Disable jabber. 0 = Normal operation (jabber enabled). R/W 0 19.8 Link Test (10BASE-T) 1 = Disable 10BASE-T link integrity test. 0 = Normal operation (10BASE-T link integrity test enabled). R/W Note 3 19.7:6 LEDC Programming bits Determine condition indicated by LEDC. bit 7 bit 6 Description 0 0 LEDC indicates collision 0 1 LEDC is off 1 0 LEDC indicates activity. 1 1 LEDC is continuously on (for diagnostic use). R/W 0,0 19.5 Advance TX Clock 1 = TX clock is advanced relative to TXD<4:0> and TX_ER by 1/2 TX_CLK cycle. 0 = Normal operation. R/W 0 19.4 5B Symbol/ (100BASE-X only) 4B Nibble 1 = 5-bit Symbol Mode (Bypass encoder/decoder); RXD<4:0> symbol data is not aligned. 0 = 4-bit Nibble Mode (Normal operation). R/W Note 4 19.3 Scrambler (100BASE-X only) 1 = Bypass transmit scrambler and receive descrambler. 0 = Normal operation (scrambler and descrambler enabled). In FX mode, the LXT970A automatically bypasses the Scrambler. Selecting Scrambler bypass in FX mode causes the LXT970A to also bypass the 4B/5B encoder and enable Symbol mode MII operation. R/W Note 5 1. R/W = Read/Write 2. The default value of bit 19.13 is determined by pin MF1. 3. If auto-negotiation is disabled, the default value of bit 19.8 is determined by pin CFG1. If auto-neg is enabled, the default value of bit 19.8 = 0. 4. The default value of bit 19.4 is determined by pin MF2 Operation. 5. The default value of bit 19.3 is determined by pin MF3 Operation. 6. If auto-negotiation is disabled, default value of bit 19.2 is determined by pin MF4. If auto-negotiation is enabled, default value of bit 19.2 = 0. |
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