HT9580 datasheet(27/63 Pages) HOLTEK

27 / 63 page

HT9580

April 28, 2000

Preliminary

Buffer status register

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

State on

POR

0031H

Buffer

Status

MSG_END

count_5

count_4

count_3

count_2

count_1

count_0

0uuu uuuu

The buffer status register will relay to the mC

the status of the message buffer when the data

ready request interrupt occurred. The

²MSG_END² bit will be set high when the data

(including address codeword and message code-

word) is at the end of this data ready interrupt

call. The valid data length of the message buffer

is determined by bit count_0 to count_5. If

²MSG_END² is low, the data length is more

than 46 or data is not at the end, the mC should

wait for the next data ready interrupt until the

bit ²MSG_END² is set high. Example 1: if the

data read from 0031H is ²95H² when a new

data ready interrupt occurred, it means the to-

tal data length is 21 including the address code-

word in this call and the message is terminated

(bit ²MSG_END² =1). The figure below illus-

trates example 1.

M e s s age B u f f er

A ddr es s C o dew or d

M e s s age C odew or d 1

M e s s age C odew or d 2

M e s s age C odew or d 19

M e s s age C odew or d 20

N/ A

0040 H

0041H

0042 H

0053 H

0054 H

0055 H

N/ A

006D H

B i t7 B i t6 B i t5 B i t4 B i t3 B i t2 B i t1B i t0

101

0031H

Example 1

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