 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
LPC1547JBD48 датащи(PDF) 69 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
LPC1547JBD48 датащи(HTML) 69 Page - NXP Semiconductors |
|
|
69 / 99 page  LPC15XX All information provided in this document is subject to legal disclaimers. © NXP B.V. 2014. All rights reserved. Product data sheet Rev. 1 — 19 February 2014 69 of 99 NXP Semiconductors LPC15xx 32-bit ARM Cortex-M3 microcontroller 12. Dynamic characteristics 12.1 Flash/EEPROM memory [1] Number of program/erase cycles. [2] Programming times are given for writing 256 bytes to the flash. Tamb <= +85 C. Flash programming with IAP calls (see LPC15xx user manual). 12.2 External clock for the oscillator in slave mode Remark: The input voltage on the XTALIN and XTALOUT pins must be 1.95 V (see Table 11). For connecting the oscillator to the XTAL pins, also see Section 14.2. [1] Parameters are valid over operating temperature range unless otherwise specified. Table 13. Flash characteristics Tamb = 40 C to +105 C. Based on JEDEC NVM qualification. Failure rate < 10 ppm for parts as specified below. Symbol Parameter Conditions Min Typ Max Unit Nendu endurance [1] 10000 100000 - cycles tret retention time powered 10 20 - years not powered 20 40 - years ter erase time page or multiple consecutive pages, sector or multiple consecutive sectors 95 100 105 ms tprog programming time [2] 0.95 1 1.05 ms Table 14. EEPROM characteristics Tamb = 40 Cto+85 C; VDD = 2.7 V to 3.6 V. Based on JEDEC NVM qualification. Failure rate < 10 ppm for parts as specified below. Symbol Parameter Conditions Min Typ Max Unit Nendu endurance 100000 1000000 - cycles tret retention time powered 100 200 - years not powered 150 300 - years tprog programming time 64 bytes - 2.9 - ms Table 15. Dynamic characteristic: external clock (XTALIN input) Tamb = 40 C to +105 C; VDD over specified ranges.[1] Symbol Parameter Conditions Min Typ[2] Max Unit fosc oscillator frequency 1 - 25 MHz Tcy(clk) clock cycle time 40 - 1000 ns tCHCX clock HIGH time Tcy(clk) 0.4 - - ns tCLCX clock LOW time Tcy(clk) 0.4 - - ns tCLCH clock rise time - - 5 ns tCHCL clock fall time - - 5 ns |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
