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SPC5644AF0MLU2 датащи(PDF) 136 Page - Freescale Semiconductor, Inc |
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SPC5644AF0MLU2 датащи(HTML) 136 Page - Freescale Semiconductor, Inc |
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136 / 138 page ![]() MPC5644A Microcontroller Data Sheet, Rev. 7 Freescale Semiconductor 136 Rev. 7 01/2012 • Minor editorial changes. •In MPC5644A feature list, moved “24 unified channels” after “1 x eMIOS”. •In Table 3MPC5644A signal properties/Column “Name” updated the following rows: DSPI_D_SCK /GPIO [98] -Changed “-” to CS[2] DSPI_D_SIN /GPIO[99] -Changed “-” to CS[3]. •In Table 11Thermal characteristics for 324-pin TEPBGA/ Column “Value” added conditional text. •In Table 21DC electrical specifications made the following changes: -For the value “VOL_S” parameter changed from “Slow/ medium/multi-voltage pad I/O output low voltage” to “Slow/medium pad I/O output low voltage”. -Added a new row for “IDDSTBY27”. -For row “IDDSTBY(operating current 0.95 -1.2V)” added max value “100” and changed typ value from “125” to “35”. -For row “IDDSTBY (operating current 2 - 5.5V)” added max value “110” and changed typ value from “135” to “45”. -For symbol “IDDSTBY 150(operating current 0.95 -1.2V)” added max value “2000”, changed typ value from “1050” to “790”,C cell changed from “T” to “P” and for symbol “IDDSTBY (operating current 2 - 5.5V)” added max value “2000”, changed typ value from “1050” to “760”, C cell changed from “T” to “P”. -Removed note 9 and note 10 (Characterization based capability) from symbol “VOL_HS”. • Splitted Table 28eQADC conversion specifications (operating)into Table 29eQADC single ended conversion specifications (operating) and Table 30eQADC differential ended conversion specifications (operating). •In Table 30 eQADC differential ended conversion specifications (operating)made the following changes: -Added the note of DIFFcmv on all of the DIFF specs. -Min value changed from (VRH-VRL)/2-5% to (VRH+VRL)/2-5 % and max value changed from (VRH-VRL)/2+5 % to (VRH+VRL)/2+5 %for DIFFcmv. •In Table 31 Cutoff frequency for additional SRAM wait statemade the following changes: -Added note “Max frequencies including 2% PLL FM”. -Max operating frequency changed from “96” to “98” and “150” to “153”. •In Section 3.13, “Configuring SRAM wait states, changed text from “MPC5644A Microcontroller Reference Manual “ to “device reference manual”. •In Table 32APC, RWSC, WWSC settings vs. frequency of operation, - Added note for “Max Flash Operating Frequency(MHz). - Changed values from 30, 60,120, 150 to 20,61,123, 153 respectively in Max Flash Operating Frequency (MHz). •In Table 33,aFlash program and erase specificationsdded two parameter “Tpsrt” and “Tesrt”. •In Table 41External Bus Interface maximum operating frequency, replacedthe <= symbol in notes with • Added note “Refer to table DSPI timing for the numbers” in all the figures under Section 3.17.8, “DSPI timing . •In Table 52Orderable part number summary, changed LBGA208 to MAPBGA and changed all packages to 123XXXX format. Table 53. Revision history (continued) Revision Date Substantive changes |
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