SPC5644AF0MLU2 datasheet(132/138 Pages) FREESCALE

132 / 138 page

MPC5644A Microcontroller Data Sheet, Rev. 7

Freescale Semiconductor

132

Rev. 3

(cont)

04/2010

Added information to AC timings section:

• New section added: Reset and configuration pin timing

• New section added: External interrupt timing (IRQ pin)

• New section added: eTPU timing

• Added Nexus debug port operating frequency table to Nexus timings section

• Added external bus interface maximum operating frequency table and calibration bus

interface maximum operation frequency table

• Added FlexCAN system clock source section

Changes to Power management control (PMC) and power on reset (POR) electrical

specifications:

• Max value for parameter 2 (vddreg) is 5.25 V (was 5.5 V)

Updated “Core voltage regulator controller external components preferred configuration”

diagram.

Changes to DC electrical specifications table:

• Slew rate on power supply pins (system requirement) changed to 25 V/ms (was

50 V/ms)

Throughout the document the maximum frequency is now 150 MHz (was 145 MHz)

Changes to DC electrical specifications:

• Parameter classifications added

•VDDREG max value changed to 5.25 V (was 5.5 V)

•VOH_LS min value changed to 2.0 V (was 2.7 V) with a load current of 0.5 mA

•VOL_LS max value changed to 0.6 V (was 0.2*VDDEH) with load current of 2 mA

•VINDC min value changed to VSSA-0.3 (was VSSA-1.0)

•VINDC max value changed to VDDA+0.3 (was VDDA+1.0)

Added new section: Configuring SRAM wait states

VRCCTL external circuit updated.

Table 53. Revision history (continued)

Revision

Date

Substantive changes

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