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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DM163006 датащи(PDF) 70 Page - Microchip Technology |
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DM163006 датащи(HTML) 70 Page - Microchip Technology |
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70 / 320 page  PIC18C601/801 DS39541A-page 70 Advance Information 2001 Microchip Technology Inc. 5.4 Chip Selects Chip select signals are used to select regions of exter- nal memory and I/O devices for access. The PIC18C801 has three chip selects and all are program- mable. The chip select signals are CS1, CS2 and CSIO. CS1 and CS2 are general purpose chip selects that are used to enable large portions of program mem- ory. CSIO is used to enable external I/O expansion. The PIC18C601uses two of these programmable chip selects: CS1 and CSIO. Two SFRs are used to control the chip select signals. These are CSEL2 and CSELIO (see Register 5-2 and Register 5-3). A chip select signal is asserted low when the CPU makes an access to a dedicated range of addresses specified in the chip select registers, CSEL2 and CSELIO. The 8-bit value found in either of these registers is decoded as one of 256, 8K banks of pro- gram memory. If both chip select registers are 00h, all of the chip select signals are disabled and their corre- sponding pins are configured as I/O. Since the last 512 bytes of program memory are dedicated to internal pro- gram RAM, the chip select signals will not activate if the program memory address falls in this range. REGISTER 5-2: CSEL2 REGISTER REGISTER 5-3: CSELIO REGISTER R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 CSL7 CSL6 CSL5 CSL4 CSL3 CSL2 CSL1 CSL0 bit 7 bit 0 bit 7-0 CSL<7:0>: Chip Select 2 Address Decode bits XXh = All eight bits are compared to the Most Significant bits PC<20:13> of the program counter. If PC<20:13> ≥ CSL<7:0> register, then the CS2 signal is low. If PC<20:13> < CSL<7:0>, CS2 is high. 00h =CS2 is inactive Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 R/W-1 CSIO7 CSIO6 CSIO5 CSIO4 CSIO3 CSIO2 CSIO1 CSIO0 bit7 bit0 bit 7-0 CSIO<7:0>: Chip Select IO Address Decode bits XXh = All eight bits are compared to the Most Significant bits PC<20:13> of the program counter. If PC<20:13> = CSIO<7:0>, then the CSIO signal is low. If not, CSIO is high. 00h =CSIO is inactive Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ - n = Value at POR ’1’ = Bit is set ’0’ = Bit is cleared x = Bit is unknown |
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