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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DM163006 датащи(PDF) 34 Page - Microchip Technology |
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DM163006 датащи(HTML) 34 Page - Microchip Technology |
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34 / 320 page  PIC18C601/801 DS39541A-page 34 Advance Information 2001 Microchip Technology Inc. TABLE 3-3: INITIALIZATION CONDITIONS FOR ALL REGISTERS Register Applicable Devices Power-on Reset MCLR Reset WDT Reset Reset Instruction Stack Over/Underflow Reset Wake-up via WDT or Interrupt TOSU 601 801 ---0 0000 ---0 0000 ---u uuuu(3) TOSH 601 801 0000 0000 0000 0000 uuuu uuuu(3) TOSL 601 801 0000 0000 0000 0000 uuuu uuuu(3) STKPTR 601 801 00-0 0000 00-0 0000 uu-u uuuu(3) PCLATU 601 801 ---0 0000 ---0 0000 ---u uuuu PCLATH 601 801 0000 0000 0000 0000 uuuu uuuu PCL 601 801 0000 0000 0000 0000 PC + 2(2) TBLPTRU 601 801 --00 0000 --00 0000 --uu uuuu TBLPTRH 601 801 0000 0000 0000 0000 uuuu uuuu TBLPTRL 601 801 0000 0000 0000 0000 uuuu uuuu TABLAT 601 801 0000 0000 0000 0000 uuuu uuuu PRODH 601 801 xxxx xxxx uuuu uuuu uuuu uuuu PRODL 601 801 xxxx xxxx uuuu uuuu uuuu uuuu INTCON 601 801 0000 000x 0000 000u uuuu uuuu(1) INTCON2 601 801 1111 -1-1 1111 -1-1 uuuu -u-u(1) INTCON3 601 801 11-0 0-00 11-0 0-00 uu-u u-uu(1) INDF0 601 801 (Note 5) (Note 5) (Note 5) POSTINC0 601 801 (Note 5) (Note 5) (Note 5) POSTDEC0 601 801 (Note 5) (Note 5) (Note 5) PREINC0 601 801 (Note 5) (Note 5) (Note 5) PLUSW0 601 801 (Note 5) (Note 5) (Note 5) FSR0H 601 801 ---- 0000 ---- 0000 ---- uuuu FSR0L 601 801 xxxx xxxx uuuu uuuu uuuu uuuu WREG 601 801 xxxx xxxx uuuu uuuu uuuu uuuu INDF1 601 801 (Note 5) (Note 5) (Note 5) POSTINC1 601 801 (Note 5) (Note 5) (Note 5) POSTDEC1 601 801 (Note 5) (Note 5) (Note 5) PREINC1 601 801 (Note 5) (Note 5) (Note 5) PLUSW1 601 801 (Note 5) (Note 5) (Note 5) FSR1H 601 801 ---- 0000 ---- 0000 ---- uuuu FSR1L 601 801 xxxx xxxx uuuu uuuu uuuu uuuu BSR 601 801 ---- 0000 ---- 0000 ---- uuuu INDF2 601 801 (Note 5) (Note 5) (Note 5) Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ’0’, q = value depends on condition, r = reserved, maintain ‘0’ Note 1: One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt vector (00008h or 00018h). 3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH, and TOSL are updated with the current value of the PC. The SKPTR is modified to point to the next location in the hardware stack. 4: See Table 3-2 for RESET value for specific condition. 5: This is not a physical register. It is an indirect pointer that addresses another register. The contents returned is the value contained in the addressed register. |
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