AD1981B

Rev. C | Page 26 of 32

EQ DATA REGISTER

Index 0x62

Reg

No.

Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

0x62

EQ

Data

CFD15

CFD14

CFD13

CFD12

CFD11

CFD10

CFD9

CFD8

CFD7

CFD6

CFD5

CFD4

CFD3

CFD2

CFD1

CFD0

0x0000

This read/write register is used to transfer EQ biquad coefficients into memory. The register data is transferred to, or retrieved from, the address pointed to by the BCA

bits in the EQ Cntrl Register (0x60). Data is written to memory only if the EQM bit (Register 0x60, Bit 15) is asserted.

Table 37.

Bit

Mnemonic

Function

CFD [15:0]

Coefficient Data

The biquad coefficients are fixed-point format values with 16 bits of resolution. The CFD15 bit is

the MSB, and the CFD0 bit is the LSB.

MIXER ADC, INPUT GAIN REGISTER

Index 0x64

Reg

No.

Name

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D3

D2

D1

D0

Default

0x64

Mixer ADC,

Volume

MXM

X

X

X

LMG3

LMG2

LMG1

LMG0

RM1

X

X

X

RMG3

RMG2

RMG1

RMG0

0x8000

If MSPLT is not set, the RM bit has no effect. All registers are not shown, and bits containing an X are assumed to be reserved. Refer to Table 39 for examples.

Table 38.

Bit

Mnemonic

Function

RMG [3:0]

Right Mixer Gain

Control

This register controls the gain into the mixer ADC from 0 dB to a maximum gain of 22.5 dB. The

least significant bit represents 1.5 dB.

RM

Right-Channel Mute

Once enabled by the MSPLT bit in Register 0x76, this bit mutes the right channel separately from

the MXM bit. Otherwise, this bit always reads 0 and has no affect when set to 1.

LMG [3:0]

Left Mixer Gain Control

This register controls the gain into the mixer ADC, from 0 dB to a maximum gain of 22.5 dB. The

least significant bit represents 1.5 dB.

MXM

Mixer Gain Register

Mute

0 = Unmuted.

1 = Muted (reset default).

Table 39. Settings for Mixer ADC, Input Gain

Reg. 0x76

Control Bits Mixer ADC, Input Gain (0x64)

Left-Channel Mixer Gain D [11:8]

Right-Channel Mixer Gain D [3:0]

MSPLT1

D15

Write

Readback

Function

D71

Write

Readback

Function

0

0

1111

1111

22.5 dB Gain

X

1111

1111

22.5 dB Gain

0

0

0000

0000

0 dB Gain

X

0000

0000

0 dB Gain

0

1

XXXX

XXXX

−∞ dB Gain, Muted

X

XXXX

XXXX

−∞ dB Gain, Muted

1

0

1111

1111

22.5 dB Gain

1

XXXX

XXXX

−∞ dB Gain, Right Only Muted

1

1

XXXX

XXXX

−∞ dB Gain, Left Only Muted

0

1111

1111

22.5 dB Gain

1

1

XXXX

XXXX

−∞ dB Gain, Left Muted

1

XXXX

XXXX

−∞ dB Gain, Right Muted

If MSPLT is not set, the RM bit has no effect.

X is a wild card and has no effect on the value.