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AD1981BBSTZ датащи(PDF) 18 Page - Analog Devices |
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AD1981BBSTZ датащи(HTML) 18 Page - Analog Devices |
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18 / 32 page ![]() AD1981B Rev. C | Page 18 of 32 PCM-OUT VOLUME REGISTER Index 0x18 Reg No. Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default 0x18 PCM-Out Volume OM X X LOV4 LOV3 LOV2 LOV1 LOV0 RM1 X X ROV4 ROV3 ROV2 ROV1 ROV0 0x8808 1 For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels. If MSPLT is not set, the RM bit has no effect. All registers are not shown, and bits containing an X are assumed to be reserved. Refer to for examples. Table 22 Table 21. Bit Mnemonic Function ROV [4:0] Right PCM-Out Volume Allows setting the PCM right-channel attenuator in 32 volume levels. The LSB represents 1.5 dB, and the range is +12 dB to −34.5 dB. The default value is 0 dB, mute enabled. RM Right-Channel Mute Once enabled by the MSPLT bit in Register 0x76, this bit mutes the right channel separately from the OM bit. Otherwise, this bit always reads 0 and has no effect when set to 1. LOV [4:0] Left PCM-Out Volume Allows setting the PCM left-channel attenuator in 32 volume levels. The LSB represents 1.5 dB, and the range is +12 dB to −34.5 dB. The default value is 0 dB, mute enabled. OM PCM-Out Volume Mute When this bit is set to 1, both the left and right channels are muted unless the MSPLT bit in Register 0x76 is set to 1, in which case this mute bit affects only the left channel. Table 22. Volume Settings for Line-In, CD Volume, AUX, and PCM-Out Control Bits Reg. 0x76 Line-In (0x10), CD (0x12), AUX (0x16), and PCM-Out (0x18) Left-Channel Volume D [12:8] Right-Channel Volume D [4:0] MSPLT1 D15 Write Readback Function D71 Write Readback Function 0 0 0 0000 0 0000 +12 dB Gain X 0 0000 0 0000 +12 dB Gain 0 0 0 1000 0 1000 0 dB Gain X 0 1000 0 1000 0 dB Gain 0 0 1 1111 1 1111 +34.5 dB Gain X 1 1111 1 1111 −34.5 dB Gain 0 1 X XXXX X XXXX −∞ dB Gain, Muted X X XXXX X XXXX −∞ dB Gain, Muted 1 0 1 1111 1 1111 −34.5 dB Gain 1 X XXXX X XXXX −∞ dB Gain, Right Only Muted 1 1 X XXXX X XXXX −∞ dB Gain, Left Only Muted 0 1 1111 1 1111 −34.5 dB Gain 1 1 X XXXX X XXXX −∞ dB Gain, Left Muted 1 X XXXX X XXXX −∞ dB Gain, Right Muted 1 For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels. If MSPLT is not set, the RM bit has no effect. X is a wild card and has no effect on the value. |
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