AD1981B

Rev. C | Page 30 of 32

Bit

Mnemonic

Function

VREFD

VREFH

MADST

Mixer ADC Status Bit

This bit indicates status of the mixer digitizing ADC (left and right channels).

0 = Mixer ADC not ready.

1 = Mixer ADC ready.

2CMIC

2-Channel MIC Select

This bit enables simultaneous recording from MIC1 and MIC2 inputs for applications that use a

stereo microphone array. This register works in conjunction with the MS bit in Register 0x20.

0 = MIC1 or MIC2 (determined by the MS bit) is routed to the record selector’s left and right MIC

channels, as well as to the mixer (reset default).

1 = MIC1 is routed to the record selector’s left MIC channel and MIC2 is routed to the record

selector’s right MIC channel. In this mode, the MS bit should be set low, and MIC1 can still be

enabled into the mixer.

MADPD

Mixer ADC Power-Down

This bit controls power-down for mixer digitizing ADC.

0 = Mixer ADC is powered on (default).

1 = Mixer ADC is powered down.

FMXE

Front DAC into Mixer

Enable

This bit controls the front (main) DAC to mixer mute switches.

0 = Front DAC outputs are allowed to sum into the mixer (reset default).

1 = Front DAC outputs are muted into the mixer (blocked).

DAM

Digital Audio Mode

PCM DAC outputs bypass the analog mixer and are sent directly to the codec output.

LODIS

LINE_OUT Disable

This bit disables the LINE_OUT pins (L/R), placing them into high Z mode so that the assigned

output audio jack can be shared for the input function (or other function).

0 = LINE_OUT pins have normal audio drive capability (reset default).

1 = LINE_OUT pins are placed into high Z mode.

MSPLT

Mute Split

This bit allows separate mute control bits for the master, headphone, LINE_IN, CD, AUX, and PCM

volume control registers as well as for the record gain register.

0 = Both left- and right-channel mutes are controlled by Bit 15 in the respective registers (reset

default).

1 = Bit 15 affects only the left-channel mute, and Bit 7 affects only the right-channel mute.

DACZ

DAC Zero-Fill

This bit determines DAC data fill under starved conditions.

0 = DAC data is repeated when DACs are starved for data (reset default).

1 = DAC is zero-filled when DACs are starved for data.