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AD1981BBSTZ датащи(PDF) 14 Page - Analog Devices |
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AD1981BBSTZ датащи(HTML) 14 Page - Analog Devices |
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14 / 32 page ![]() AD1981B Rev. C | Page 14 of 32 HEADPHONE VOLUME REGISTER Index 0x04 This register controls the headphone volume controls for both stereo channels and the mute bit. Each volume subregister contains five bits, generating 32 volume levels with 31 steps of 1.5 dB each. Because AC ’97 defines 6-bit volume registers, to maintain compatibility, whenever the D5 or D13 bits are set to 1, their respective lower five volume bits are automatically set to 1 by the codec logic. On readback, all lower five bits read 1s whenever these bits are set to 1. Refer to Table 12 for examples. Reg No. Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default 0x04 Headphone Volume HPM X X LHV4 LHV3 LHV2 LHV1 LHV0 RM1 X X RHV4 RHV3 RHV2 RHV1 RHV0 0x8000 1 For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels. If MSPLT is not set, the RM bit has no effect. All registers are not shown, and bits containing an X are assumed to be reserved. Table 11. Bit Mnemonic Function RHV [4:0] Right Headphone Volume Control The least significant bit represents 1.5 dB. This register controls the output from 0 dB to a maximum attenuation of 46.5 dB. RM Right-Channel Mute Once enabled by the MSPLT bit in Register 0x76, this bit mutes the right channel separately from the HPM bit. Otherwise, this bit always reads 0 and has no effect when set to 1. LHV [4:0] Left Headphone Volume Control The least significant bit represents 1.5 dB. This register controls the output from 0 dB to a maximum attenuation of 46.5 dB. HPM Headphone Volume Mute When this bit is set to 1, both the left and right channels are muted, unless the MSPLT bit in Register 0x76 is set to 1, in which case this mute bit affects only the left channel. Table 12. Volume Settings for Master and Headphone Reg. 0x76 Control Bits Master Volume (0x02) and Headphone Volume (0x04) Left-Channel Volume D [13:8] Right-Channel Volume D [5:0] MSPLT1 D15 Write Readback Function D71 Write Readback Function 0 0 00 0000 00 0000 0 dB Gain X 00 0000 00 0000 0 dB Gain 0 0 00 1111 00 1111 −22.5 dB Gain X 00 1111 00 1111 −22.5 dB Gain 0 0 01 1111 01 1111 −46.5 dB Gain X 01 1111 01 1111 −46.5 dB Gain 0 0 1X XXXX 01 1111 −46.5 dB Gain X 1X XXXX 01 1111 −46.5 dB Gain 0 1 XX XXXX XX XXXX −∞ dB Gain, Muted X XX XXXX XX XXXX −∞ dB Gain, Muted 1 0 1X XXXX 01 1111 −46.5 dB Gain 1 XX XXXX XX XXXX −∞ dB Gain, Right Only Muted 1 1 XX XXXX XX XXXX −∞ dB Gain, Left Only Muted 0 XX XXXX XX XXXX −46.5 dB Gain 1 1 XX XXXX XX XXXX −∞ dB Gain, Left Muted 1 XX XXXX XX XXXX −∞ dB Gain, Right Muted 1 For AC ’97 compatibility, Bit D7 (RM) is available only by setting the MSPLT bit, Register 0x76. The MSPLT bit enables separate mute bits for the left and right channels. If MSPLT is not set, the RM bit has no effect. X is a wild card and has no effect on the value. |
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