HT45F4M datasheet(37/138 Pages) HOLTEK

37 / 138 page

Rev. 1.10

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HT45F4M

Lithium Battery Backup Power ASSP MCU

HT45F4M

Lithium Battery Backup Power ASSP MCU

Operating Mode Switching

Thedevicecanswitchbetweenoperatingmodesdynamicallyallowingtheusertoselectthebest

performance/powerratioforthepresenttaskinhand.Inthiswaymicrocontrolleroperationsthat

donotrequirehighperformancecanbeexecutedusingslowerclocksthusrequiringlessoperating

currentandprolongingbatterylifeinportableapplications.

Insimpleterms,ModeSwitchingbetweentheNORMALModeandSLOWModeisexecutedusingthe

HLCLKbitandCKS2~CKS0bitsintheSMODregisterwhileModeSwitchingfromtheNORMAL/

SLOWModestotheSLEEP/IDLEModesisexecutedviatheHALTinstruction.WhenaHALT

instructionisexecuted,whetherthedeviceenterstheIDLEModeortheSLEEPModeisdeterminedby

theconditionoftheIDLENbitintheSMODregisterandFSYSONintheCTRLregister.

WhentheHLCLKbitswitchestoalowlevel,whichimpliesthatclocksourceisswitchedfromthe

highspeedclocksource,fH,totheclocksource,fH/2~fH/64orfSUB.IftheclockisfromthefSUB,the

highspeedclocksourcewillstoprunningtoconservepower.Whenthishappensitmustbenoted

thatthefH/16andfH/64internalclocksourceswillalsostoprunning,whichmayaffecttheoperation

ofotherinternalfunctionssuchastheTMs.Theaccompanyingflowchartshowswhathappenswhen

thedevicemovesbetweenthevariousoperatingmodes.

NORMAL Mode to SLOW Mode Switching

WhenrunningintheNORMALMode,whichusesthehighspeedsystemoscillator,andtherefore

consumesmorepower,thesystemclockcanswitchtorunintheSLOWModebysettingthe

HLCLKbitto0andsettingtheCKS2~CKS0bitsto000Bor001BintheSMODregister.Thiswill

thenusethelowspeedsystemoscillatorwhichwillconsumelesspower.Usersmaydecidetodothis

forcertainoperationswhichdonotrequirehighperformanceandcansubsequentlyreducepower

consumption.

TheSLOWModeissourcedfromtheLIRCoscillatorandthereforerequiresthisoscillatortobe

stablebeforefullmodeswitchingoccurs.ThisismonitoredusingtheLTObitintheSMODregister.

SLOW Mode to NORMAL Mode Switching

InSLOWModethesystemusesLIRClowspeedsystemoscillator.ToswitchbacktotheNORMAL

Mode,wherethehighspeedsystemoscillatorisused,theHLCLKbitshouldbesetto“1”or

HLCLKbitis“0”,butCKS2~CKS0issetto“010”,“011”,“100”,“101”,“110”or“111”.Asa

certainamountoftimewillberequiredforthehighfrequencyclocktostabilise,thestatusofthe

HTObitischecked.Theamountoftimerequiredforhighspeedsystemoscillatorstabilization

dependsuponwhichhighspeedsystemoscillatortypeisused.

Entering the SLEEP Mode

ThereisonlyonewayforthedevicetoentertheSLEEPModeandthatistoexecutethe“HALT”

instructionintheapplicationprogramwiththeIDLENbitinSMODregisterequalto“0”.Whenthis

instructionisexecutedundertheconditionsdescribedabove,thefollowingwilloccur:

• ThesystemclockandTimeBaseclockwillbestoppedandtheapplicationprogramwillstopat

the“HALT”instruction.

• TheDataMemorycontentsandregisterswillmaintaintheirpresentcondition.

• TheWDTwillbeclearedandresumecounting.

• TheI/Oportswillmaintaintheirpresentconditions.

• Inthestatusregister,thePowerDownflag,PDF,willbesetandtheWatchdogtime-outflag,TO,

willbecleared.

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