PIC16F87 datasheet(119/230 Pages) MICROCHIP

119 / 230 page

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DS30487D-page 119

PIC16F87/88

12.4

Configuring Analog Port Pins

The ADCON1, ANSEL, TRISA and TRISB registers

control the operation of the A/D port pins. The port pins

that are desired as analog inputs must have their

corresponding TRIS bits set (input). If the TRIS bit is

cleared (output), the digital output level (VOH or VOL)

will be converted.

The A/D operation is independent of the state of the

CHS<2:0> bits and the TRIS bits.

12.5

A/D Conversions

Clearing the GO/DONE bit during a conversion will

abort the current conversion. The A/D Result register

pair will NOT be updated with the partially completed

A/D conversion sample. That is, the ADRESH:ADRESL

registers will continue to contain the value of the last

completed conversion (or the last value written to the

ADRESH:ADRESL registers). After the A/D conversion

is aborted, a 2 TAD wait is required before the next

acquisition is started. After this 2 TAD wait, acquisition

on the selected channel is automatically started. The

GO/DONE bit can then be set to start the conversion.

In Figure 12-3, after the GO/DONE bit is set, the first

time segment has a minimum of TCY and a maximum of

TAD.

12.5.1

A/D RESULT REGISTERS

The ADRESH:ADRESL register pair is the location

where the 10-bit A/D result is loaded at the completion

of the A/D conversion. This register pair is 16 bits wide.

The A/D module gives the flexibility to left or right justify

the 10-bit result in the 16-bit result register. The A/D

Format Select bit (ADFM) controls this justification.

Figure 12-4 shows the operation of the A/D result

justification. The extra bits are loaded with ‘0’s. When

an A/D result will not overwrite these locations (A/D

disable), these registers may be used as two general

purpose 8-bit registers.

FIGURE 12-3:

A/D CONVERSION TAD CYCLES

FIGURE 12-4:

A/D RESULT JUSTIFICATION

Note 1: When reading the Port register, all pins

configured as analog input channels will

read as cleared (a low level). Pins config-

ured as digital inputs will convert an

analog input. Analog levels on a digitally

configured

input

will

not

affect

the

conversion accuracy.

2: Analog levels on any pin that is defined as

a digital input (including the RA4:RA0 and

RB7:RB6 pins), may cause the input

buffer to consume current out of the

device specification.

Note:

The GO/DONE bit should NOT be set in

the same instruction that turns on the A/D.

TAD1

TAD2

TAD3

TAD4

TAD5

TAD6

TAD7

TAD8

TAD9

Set GO/DONE bit

Holding capacitor is disconnected from analog input (typically 100 ns)

TAD10 TAD11

TCY to TAD

Conversion starts

ADRES is loaded,

GO/DONE bit is cleared,

ADIF bit is set,

holding capacitor is connected to analog input

10-bit Result

ADRESH

ADRESL

0000 00

ADFM = 0

2 1 0 7

10-bit Result

ADRESH

ADRESL

10-bit Result

0000 00

0 7 6 5

ADFM = 1

Right Justified

Left Justified

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