PIC16F87 datasheet(18/230 Pages) MICROCHIP

18 / 230 page

PIC16F87/88

DS30487D-page 18

 2002-2013 Microchip Technology Inc.

2.2.2.2

OPTION_REG Register

The OPTION_REG register is a readable and writable

the TMR0 prescaler/WDT postscaler (single assign-

able register known also as the prescaler), the external

INT interrupt, TMR0 and the weak pull-ups on PORTB.

OPTION_REG: OPTION CONTROL REGISTER (ADDRESS 81h, 181h)

Note:

To achieve a 1:1 prescaler assignment for

the TMR0 register, assign the prescaler to

the Watchdog Timer. Although the pres-

caler can be assigned to either the WDT or

Timer0, but not both, a new divide counter

is implemented in the WDT circuit to give

multiple WDT time-out selections. This

allows TMR0 and WDT to each have their

own

scaler.

Refer

Section 15.12

“Watchdog Timer (WDT)” for further

details.

R/W-1

RBPU

INTEDG

T0CS

T0SE

PSA

PS2

PS1

PS0

bit 7

bit 0

bit 7

RBPU: PORTB Pull-up Enable bit

= PORTB pull-ups are disabled

= PORTB pull-ups are enabled by individual port latch values

bit 6

INTEDG: Interrupt Edge Select bit

= Interrupt on rising edge of RB0/INT pin

= Interrupt on falling edge of RB0/INT pin

bit 5

T0CS: TMR0 Clock Source Select bit

= Transition on RA4/T0CKI/C2OUT pin

= Internal instruction cycle clock (CLKO)

bit 4

T0SE: TMR0 Source Edge Select bit

= Increment on high-to-low transition on RA4/T0CKI/C2OUT pin

= Increment on low-to-high transition on RA4/T0CKI/C2OUT pin

bit 3

PSA: Prescaler Assignment bit

= Prescaler is assigned to the WDT

= Prescaler is assigned to the Timer0 module

bit 2-0

PS<2:0>: Prescaler Rate Select bits

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

Bit Value

TMR0 Rate

WDT Rate

000

1 : 2

1 : 1

001

1 : 4

1 : 2

010

1 : 8

1 : 4

011

1 : 16

1 : 8

100

1 : 32

1 : 16

101

1 : 64

1 : 32

110

1 : 128

1 : 64

111

1 : 256

1 : 128

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