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LPC4350 датащи(PDF) 119 Page - NXP Semiconductors |
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LPC4350 датащи(HTML) 119 Page - NXP Semiconductors |
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119 / 145 page ![]() LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Objective data sheet Rev. 2.1 — 23 September 2011 119 of 145 NXP Semiconductors LPC4350/30/20/10 32-bit ARM Cortex-M4/M0 microcontroller 12. ADC/DAC electrical characteristics [1] Conditions: VSSA =0V, VDDA(3V3) =3.3 V. [2] The ADC is monotonic, there are no missing codes. [3] The differential linearity error (ED) is the difference between the actual step width and the ideal step width. See Figure 39. [4] The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and the ideal transfer curve after appropriate adjustment of gain and offset errors. See Figure 39. [5] The offset error (EO) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the ideal curve. See Figure 39. [6] The gain error (EG) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset error, and the straight line which fits the ideal transfer curve. See Figure 39. [7] The absolute error (ET) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated ADC and the ideal transfer curve. See Figure 39. [8] See <tbd>. [9] Tamb = 25 C; maximum sampling frequency fs = 4.5 MHz and analog input capacitance Cia = 1pF. [10] Input resistance Ri depends on the sampling frequency fs: Ri = 1 / (fs Cia). Table 22. ADC characteristics VDDA(3V3) over specified ranges; Tamb = 40 C to +85 C; ADC frequency 4.5 MHz; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit VIA analog input voltage 0 - VDDA(3V3) V Cia analog input capacitance - - <tbd> pF ED differential linearity error [1][2][3] - - <tbd> LSB EL(adj) integral non-linearity [1][4] - - <tbd> LSB EO offset error [1][5] - <tbd> LSB EG gain error [1][6] - - <tbd> % ET absolute error [1][7] - - <tbd> LSB Rvsi voltage source interface resistance [8] - - <tbd> k Ri input resistance [9][10] - - <tbd> M fclk(ADC) ADC clock frequency - - <tbd> MHz fc(ADC) ADC conversion frequency - - <tbd> kSamples/s |
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