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LPC4350 датащи(PDF) 76 Page - NXP Semiconductors |
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LPC4350 датащи(HTML) 76 Page - NXP Semiconductors |
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76 / 145 page ![]() LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Objective data sheet Rev. 2.1 — 23 September 2011 76 of 145 NXP Semiconductors LPC4350/30/20/10 32-bit ARM Cortex-M4/M0 microcontroller 7.17.4.1 Features • Dynamic memory interface support including single data rate SDRAM. • Asynchronous static memory device support including RAM, ROM, and flash, with or without asynchronous page mode. • Low transaction latency. • Read and write buffers to reduce latency and to improve performance. • 8/16/32 data and 24 address lines wide static memory support. • 16 bit and 32 bit wide chip select SDRAM memory support. • Static memory features include: – Asynchronous page mode read – Programmable Wait States – Bus turnaround delay – Output enable and write enable delays – Extended wait • Four chip selects for synchronous memory and four chip selects for static memory devices. • Power-saving modes dynamically control EMC_CKEOUT and EMC_CLK signals to SDRAMs. • Dynamic memory self-refresh mode controlled by software. • Controller supports 2048 (A0 to A10), 4096 (A0 to A11), and 8192 (A0 to A12) row address synchronous memory parts. That is typical 512 MB, 256 MB, and 128 MB parts, with 4, 8, 16, or 32 data bits per device. • Separate reset domains allow the for auto-refresh through a chip reset if desired. Note: Synchronous static memory devices (synchronous burst mode) are not supported. 7.17.5 High-speed USB Host/Device/OTG interface (USB0) Remark: The USB0 controller is available on parts LPC4350/30/20. See Table 2. The USB OTG module allows the LPC4350/30/20/10 to connect directly to a USB Host such as a PC (in device mode) or to a USB Device in host mode. 7.17.5.1 Features • Complies with Universal Serial Bus specification 2.0. • Complies with USB On-The-Go supplement. • Complies with Enhanced Host Controller Interface Specification. • Supports auto USB 2.0 mode discovery. • Supports all high-speed USB-compliant peripherals. • Supports all full-speed USB-compliant peripherals. • Supports software Host Negotiation Protocol (HNP) and Session Request Protocol (SRP) for OTG peripherals. • Contains UTMI+ compliant transceiver (PHY). • Supports interrupts. |
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