LPC4350 datasheet(18/145 Pages) NXP

18 / 145 page

LPC4350_30_20_10

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Objective data sheet

Rev. 2.1 — 23 September 2011

18 of 145

NXP Semiconductors

LPC4350/30/20/10

32-bit ARM Cortex-M4/M0 microcontroller

P2_7

H14

C10 138 96

[3]

I; PU I/O

GPIO0[7] — General purpose digital input/output pin.

If this pin is pulled LOW at reset, the part enters ISP

mode using USART0.

CTOUT_1 — SCT output 1. Match output 1 of timer 0.

I/O

U3_UCLK — Serial clock input/output for USART3 in

synchronous mode.

I/O

EMC_A9 — External memory address line 9.

R — Function reserved.

T3_MAT3 — Match output 3 of timer 3.

R — Function reserved.

P2_8

J16

140 98

[3]

I; PU I/O

SGPIO15 — General purpose digital input/output pin.

Boot pin (see Table 5).

CTOUT_0 — SCT output 0. Match output 0 of timer 0.

I/O

U3_DIR — RS-485/EIA-485 output enable/direction

control for USART3.

I/O

EMC_A8 — External memory address line 8.

I/O

GPIO5[7] — General purpose digital input/output pin.

R — Function reserved.

P2_9

H16

B10

144 102

[3]

I; PU I/O

GPIO1[10] — General purpose digital input/output

pin. Boot pin (see Table 5).

CTOUT_3 — SCT output 3. Match output 3 of timer 0.

I/O

U3_BAUD — <tbd> for USART3.

I/O

EMC_A0 — External memory address line 0.

R — Function reserved.

P2_10

G16

146 104

[3]

I; PU I/O

GPIO0[14] — General purpose digital input/output

pin.

CTOUT_2 — SCT output 2. Match output 2 of timer 0.

U2_TXD — Transmitter output for USART2.

I/O

EMC_A1 — External memory address line 1.

R — Function reserved.

Table 3.

Pin description …continued

LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See Table 2.

Symbol

Description

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