DSPIC30F2010 datasheet(31/202 Pages) MICROCHIP

31 / 202 page

DS70118J-page 31

dsPIC30F2010

4.0

ADDRESS GENERATOR UNITS

The dsPIC DSC core contains two independent

address generator units: the X AGU and Y AGU. The Y

AGU supports word-sized data reads for the DSP MAC

class of instructions only. The dsPIC DSC AGUs

support three types of data addressing:

• Linear Addressing

• Modulo (Circular) Addressing

• Bit-Reversed Addressing

Linear and Modulo Data Addressing modes can be

applied to data space or program space. Bit-Reversed

Addressing is only applicable to data space addresses.

4.1

Instruction Addressing Modes

The Addressing modes in Table 4-1 form the basis of

the Addressing modes optimized to support the specific

features of individual instructions. The Addressing

modes provided in the MAC class of instructions are

somewhat different from those in the other instruction

types.

4.1.1

FILE REGISTER INSTRUCTIONS

Most file register instructions use a 13-bit address field

(f) to directly address data present in the first 8192

bytes of data memory (near data space). Most file

which is denoted as WREG in these instructions. The

destination is typically either the same file register, or

WREG (with the exception of the MUL instruction),

which writes the result to a register or register pair. The

MOV

instruction allows additional flexibility and can

access the entire data space.

TABLE 4-1:

FUNDAMENTAL ADDRESSING MODES SUPPORTED

Note:

This data sheet summarizes features of

this group of dsPIC30F devices and is not

intended to be a complete reference

source. For more information on the CPU,

peripherals,

descriptions

and

general device functionality, refer to the

“dsPIC30F Family Reference Manual”

(DS70046). For more information on the

device instruction set and programming,

refer to the “16-bit MCU and DSC Pro-

grammer’s

Reference

Manual”

(DS70157).

Addressing Mode

Description

File Register Direct

The address of the file register is specified explicitly.

The contents of a register are accessed directly.

The contents of Wn forms the Effective Address (EA).

The contents of Wn forms the EA. Wn is post-modified (incremented or

decremented) by a constant value.

Wn is pre-modified (incremented or decremented) by a signed constant

value to form the EA.

The sum of Wn and Wb forms the EA.

The sum of Wn and a literal forms the EA.

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